LEADER 02400oam 2200493 450 001 9910299498503321 005 20190911112725.0 010 $a3-319-02547-3 024 7 $a10.1007/978-3-319-02547-6 035 $a(OCoLC)864756563 035 $a(MiFhGG)GVRL6XLE 035 $a(EXLCZ)992550000001152752 100 $a20130913d2014 uy 0 101 0 $aeng 135 $aurun|---uuuua 181 $ctxt 182 $cc 183 $acr 200 10$aSynthesizable VHDL design for FPGAs /$fEduardo Augusto Bezerra, Djones Vinicius Lettnin 205 $a1st ed. 2014. 210 1$aCham, Switzerland :$cSpringer,$d2014. 215 $a1 online resource (vii, 157 pages) $cillustrations (some color) 225 0 $aGale eBooks 300 $aDescription based upon print version of record. 311 $a3-319-02546-5 320 $aIncludes bibliographical references. 327 $aDigital Systems, FPGAs and the Design Flow -- HDL Based Designs -- Hierarchical Design -- Multiplexer and Demultiplexer -- Code Converters -- Sequential Circuits, Latches and Flip-Flops -- Synthesis of Finite State Machines -- Finite State Machines as Control Modules -- Processes in Details -- Arithmetic Circuits -- VHDL Design Examples for FPGA Synthesis. 330 $aThis book provides a gradual description of very-high-speed integrated circuits hardware description language (VHDL), targeting the design of digital systems to be implemented in field-programmable gate array (FPGA) platforms. It is organized in a very didactic way. The adopted methodology was matured over 20 years of teaching experience in the subject. The examples in the book were planned targeting two FPGA platforms, one used widely around the world and the other one developed by a Brazilian company. 606 $aVHDL (Computer hardware description language) 606 $aField programmable gate arrays 615 0$aVHDL (Computer hardware description language) 615 0$aField programmable gate arrays. 676 $a005.1 676 $a620 676 $a621.381 676 $a621.3815 700 $aBezerra$b Eduardo Augusto$4aut$4http://id.loc.gov/vocabulary/relators/aut$0948388 702 $aLettnin$b Djones Vinicius 801 0$bMiFhGG 801 1$bMiFhGG 906 $aBOOK 912 $a9910299498503321 996 $aSynthesizable VHDL Design for FPGAs$92143774 997 $aUNINA