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010   $a3-319-04942-9
024 7 $a10.1007/978-3-319-04942-7
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035   $a(EBL)1698173
035   $a(OCoLC)881166040
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035   $a(PQKBTitleCode)TC0001186936
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035   $a(MiAaPQ)EBC1698173
035   $a(DE-He213)978-3-319-04942-7
035   $a(PPN)177822198
035   $a(EXLCZ)992670000000548028
100   $a20140321d2014      u|         0
101 0 $aeng
135   $aur|n|---|||||
181   $ctxt
182   $cc
183   $acr
200 10$aScalable and Near-Optimal Design Space Exploration for Embedded Systems /$fby Angeliki Kritikakou, Francky Catthoor, Costas Goutis
205   $a1st ed. 2014.
210  1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2014.
215   $a1 online resource (287 p.)
300   $aDescription based upon print version of record.
311   $a3-319-04941-0 
320   $aIncludes bibliographical references and index.
327   $aIntroduction & Motivation -- Reusable DSE methodology for scalable & near-optimal frameworks -- Part I Background memory management methodologies -- Development of intra-signal in-place methodology -- Pattern representation -- Intra-signal in-place methodology for non-overlapping scenario -- Intra-signal in-place methodology for overlapping scenario -- Part II Processing related mapping methodologies -- Design-time scheduling techniques DSE framework -- Methodology to develop design-time scheduling techniques under constraints -- Design Exploration Methodology for Microprocessor & HW accelerators -- Conclusions & Future Directions.
330   $aThis book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies.  The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems.  Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design.   ? Describes design space exploration (DSE) methodologies for data storage and processing in embedded systems, which achieve near-optimal solutions with scalable exploration time; ? Presents a set of principles and the processes which support the development of the proposed scalable and near-optimal methodologies; ? Enables readers to apply scalable and near-optimal methodologies to the intra-signal in-place optimization step for both regular and irregular memory accesses.
606   $aElectronic circuits
606   $aMicroprocessors
606   $aElectronics
606   $aMicroelectronics
606   $aEnergy
606   $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068
606   $aProcessor Architectures$3https://scigraph.springernature.com/ontologies/product-market-codes/I13014
606   $aElectronics and Microelectronics, Instrumentation$3https://scigraph.springernature.com/ontologies/product-market-codes/T24027
606   $aEnergy, general$3https://scigraph.springernature.com/ontologies/product-market-codes/100000
615  0$aElectronic circuits.
615  0$aMicroprocessors.
615  0$aElectronics.
615  0$aMicroelectronics.
615  0$aEnergy.
615 14$aCircuits and Systems.
615 24$aProcessor Architectures.
615 24$aElectronics and Microelectronics, Instrumentation.
615 24$aEnergy, general.
676   $a004.1
676   $a006.2/2
676   $a620
676   $a621.042
700   $aKritikakou$b Angeliki$4aut$4http://id.loc.gov/vocabulary/relators/aut$0873967
702   $aCatthoor$b Francky$4aut$4http://id.loc.gov/vocabulary/relators/aut
702   $aGoutis$b Costas$4aut$4http://id.loc.gov/vocabulary/relators/aut
906   $aBOOK
912   $a9910299494903321
996   $aScalable and Near-Optimal Design Space Exploration for Embedded Systems$91951239
997   $aUNINA