LEADER 03288oam  2200457   450 
001 9910299486003321
005 20190911103512.0
010   $a1-4614-8274-7
024 7 $a10.1007/978-1-4614-8274-1
035   $a(OCoLC)863823155
035   $a(MiFhGG)GVRL6VVI
035   $a(EXLCZ)992550000001151551
100   $a20130911d2014      uy             0
101 0 $aeng
135   $aurun|---uuuua
181   $ctxt
182   $cc
183   $acr
200 00$aRouting algorithms in networks-on-chip /$fMaurizio Palesi, Masoud Daneshtalab, editors
205   $a1st ed. 2014.
210  1$aNew York :$cSpringer,$d2014.
215   $a1 online resource (xiv, 410 pages) $cillustrations (some color)
225 0 $aGale eBooks
300   $aDescription based upon print version of record.
311   $a1-4614-8273-9 
320   $aIncludes bibliographical references and index.
327   $aPart I Performance Improvement -- Basic Concepts on On-Chip Networks -- A Heuristic Framework for Designing and Exploring Deterministic Routing Algorithm for NoCs -- Run-Time Deadlock Detection -- The Abacus Turn Model -- Learning-based Routing Algorithms for on-Chip Networks -- Part II Multicast Communication -- Efficient and Deadlock-Free Tree-based Multicast Routing Method for Network-on-Chip -- Path-based Multicast Routing for 2D and 3D Mesh Networks -- Part III Fault Tolerance and Reliability -- Fault-Tolerant Routing Algorithms in Networks-on-Chip -- Reliable and Adaptive Algorithms for 2D and 3D Networks-on-Chip.
330   $aThis book provides a single-source reference to routing algorithms for Networks-on-Chip (NoCs), as well as in-depth discussions of advanced solutions applied to current and next generation, many core NoC-based Systems-on-Chip (SoCs). After a basic introduction to the NoC design paradigm and architectures, routing algorithms for NoC architectures are presented and discussed at all abstraction levels, from the algorithmic level to actual implementation.  Coverage emphasizes the role played by the routing algorithm and is organized around key problems affecting current and next generation, many-core SoCs. A selection of routing algorithms is included, specifically designed to address key issues faced by designers in the ultra-deep sub-micron (UDSM) era, including performance improvement, power, energy, and thermal issues, fault tolerance and reliability.   ·         Provides a comprehensive overview of routing algorithms for Networks-on-Chip and NoC-based, manycore systems; ·         Describes routing algorithms for NoC architectures at all abstraction levels, from the algorithmic level to actual implementation; ·         Discusses the impact on NoC routing algorithms of key design objectives, such as power dissipation, energy consumption, thermal aspects, reliability, and performance.
606   $aNetworks on a chip
606   $aComputer algorithms
615  0$aNetworks on a chip.
615  0$aComputer algorithms.
676   $a621.381531
702   $aPalesi$b Maurizio
702   $aDaneshtalab$b Masoud
801  0$bMiFhGG
801  1$bMiFhGG
906   $aBOOK
912   $a9910299486003321
996   $aRouting Algorithms in Networks-on-Chip$92220129
997   $aUNINA