LEADER 03724oam 2200469 450 001 9910299481703321 005 20190911112726.0 010 $a3-319-03925-3 024 7 $a10.1007/978-3-319-03925-1 035 $a(OCoLC)869220982 035 $a(MiFhGG)GVRL6YWF 035 $a(EXLCZ)993710000000083701 100 $a20131127d2014 uy 0 101 0 $aeng 135 $aurun|---uuuua 181 $ctxt 182 $cc 183 $acr 200 10$aContinuous-time digital front-ends for multistandard wireless transmission /$fPieter A.J. Nuyts, Patrick Reynaert, Wim Dehaene 205 $a1st ed. 2014. 210 1$aCham, Switzerland :$cSpringer,$d2014. 215 $a1 online resource (xxv, 309 pages) $cillustrations 225 1 $aAnalog Circuits and Signal Processing,$x1872-082X 300 $a"ISSN: 1872-082X." 300 $a"ISSN: 2197-1854 (electronic)." 311 $a3-319-03924-5 320 $aIncludes bibliographical references at the end of each chapters and index. 327 $aIntroduction -- Digital Transmitter Architectures: Overview -- High-Level Analysis of Fully Digital PWM Transmitters -- Continuous-time Digital Design Techniques -- A 65-nm CMOS Fully Digital Reconfigurable Transmitter Front-End for Class-E PA based on Baseband PWM -- A 40-nm CMOS Fully Digital Reconfigurable Transmitter with Class-D Pas using Baseband and RF PWM -- Conclusions and Future Work. 330 $aThis book describes the design of fully digital multistandard transmitter front-ends which can directly drive one or more switching power amplifiers, thus eliminating all other analog components.  After reviewing different architectures, the authors focus on polar architectures using pulse width modulation (PWM), which are entirely based on unclocked delay lines and other continuous-time digital hardware.  As a result, readers are enabled to shift accuracy concerns from the voltage domain to the time domain, to coincide with submicron CMOS technology scaling.  The authors present different architectural options and compare them, based on their effect on the signal and spectrum quality.  Next, a high-level theoretical analysis of two different PWM-based architectures ? baseband PWM and RF PWM ? is made.  On the circuit level, traditional digital components and design techniques are revisited from the point of view of continuous-time digital circuits.  Important design criteria are identified and different solutions are presented, along with their advantages and disadvantages.  Finally, two chips designed in nanometer CMOS technologies are described, along with measurement results for validation. ˇ      Describes the design of multistandard digital transmitters and/or continuous-time digital circuits, including theoretical models and adapted implementations of digital building blocks; ˇ      Uses a top-down approach, moving from the architectural level, via mathematical models and high-level simulations, down to circuit-level implementation aspects, including parasitic capacitances and variability; ˇ      Applies techniques described to the design of two Ghz-range multistandard transmitters. 410 0$aAnalog circuits and signal processing series. 606 $aDigital integrated circuits 615 0$aDigital integrated circuits. 676 $a621.39732 700 $aNuyts$b Pieter A. J$4aut$4http://id.loc.gov/vocabulary/relators/aut$0945763 702 $aReynaert$b Patrick 702 $aDehaene$b Wim 801 0$bMiFhGG 801 1$bMiFhGG 906 $aBOOK 912 $a9910299481703321 996 $aContinuous-Time Digital Front-Ends for Multistandard Wireless Transmission$92135893 997 $aUNINA