LEADER 04027nam  22006375  450 
001 9910298978603321
005 20200705094220.0
010   $a3-658-08047-7
024 7 $a10.1007/978-3-658-08047-1
035   $a(CKB)3710000000277668
035   $a(EBL)1965870
035   $a(OCoLC)908084588
035   $a(SSID)ssj0001386056
035   $a(PQKBManifestationID)11883989
035   $a(PQKBTitleCode)TC0001386056
035   $a(PQKBWorkID)11349334
035   $a(PQKB)11578583
035   $a(MiAaPQ)EBC1965870
035   $a(DE-He213)978-3-658-08047-1
035   $a(PPN)183090306
035   $a(EXLCZ)993710000000277668
100   $a20141110d2014      u|         0
101 0 $aeng
135   $aur|n|---|||||
181   $ctxt
182   $cc
183   $acr
200 10$aDesign Concepts for a Virtualizable Embedded MPSoC Architecture $eEnabling Virtualization in Embedded Multi-Processor Systems /$fby Alexander Biedermann
205   $a1st ed. 2014.
210  1$aWiesbaden :$cSpringer Fachmedien Wiesbaden :$cImprint: Springer Vieweg,$d2014.
215   $a1 online resource (222 p.)
300   $a"Research"--Cover.
311   $a3-658-08046-9 
320   $aIncludes bibliographical references.
327   $aThe ?Nulticore? Dilemma -- Virtualizable Architecture for embedded MPSoC -- The Virtualizable MPSoC: Requirements, Concepts, and Design Flows -- Application Scenarios -- Conclusion and Outlook.
330   $aAlexander Biedermann presents a generic hardware-based virtualization approach, which may transform an array of any off-the-shelf embedded processors into a multi-processor system with high execution dynamism. Based on this approach, he highlights concepts for the design of energy aware systems, self-healing systems as well as parallelized systems. For the latter, the novel so-called Agile Processing scheme is introduced by the author, which enables a seamless transition between sequential and parallel execution schemes. The design of such virtualizable systems is further aided by introduction of a dedicated design framework, which integrates into existing, commercial workflows. As a result, this book provides comprehensive design flows for the design of embedded multi-processor systems-on-chip. Contents Virtualization for Embedded Processors Generic Virtualization Layer for Multi-Processor Systems-on-Chip Design Flow for Self-Healing Systems Design Flow for Agile Processing Systems Target Groups Scientists and students in the field of embedded systems, especially reconfigurable systems Engineers in the field of embedded HW/SW systems, such as in the automotive domain About the Author Alexander Biedermann completed his doctoral thesis at the Integrated Circuits and Systems Lab, Technische Universität Darmstadt, and at the Center for Advanced Security Research Darmstadt (CASED) under supervision of Prof. Dr.-Ing. Sorin A. Huss.
606   $aComputer hardware
606   $aComputer organization
606   $aSoftware engineering
606   $aComputer Hardware$3https://scigraph.springernature.com/ontologies/product-market-codes/I1200X
606   $aComputer Systems Organization and Communication Networks$3https://scigraph.springernature.com/ontologies/product-market-codes/I13006
606   $aSoftware Engineering/Programming and Operating Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/I14002
615  0$aComputer hardware.
615  0$aComputer organization.
615  0$aSoftware engineering.
615 14$aComputer Hardware.
615 24$aComputer Systems Organization and Communication Networks.
615 24$aSoftware Engineering/Programming and Operating Systems.
676   $a004
676   $a004.6
676   $a005.1
700   $aBiedermann$b Alexander$4aut$4http://id.loc.gov/vocabulary/relators/aut$0875226
906   $aBOOK
912   $a9910298978603321
996   $aDesign Concepts for a Virtualizable Embedded MPSoC Architecture$91953993
997   $aUNINA