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III G 19/II $cV. 2$g3$i2008000087210$lle008$o-$pE0.00$q-$rl$s- $t0$u0$v0$w0$x0$y.i15659380$z25-02-15 996 $aOrigini del teatro italiano$9150868 997 $aUNISALENTO 998 $ale008$b01-04-03$cm$da $e-$fita$git $h0$i2 LEADER 04012nam 22006015 450 001 9910254248403321 005 20200703121810.0 010 $a3-319-29599-3 024 7 $a10.1007/978-3-319-29599-2 035 $a(CKB)3710000000596543 035 $a(EBL)4398745 035 $a(SSID)ssj0001653660 035 $a(PQKBManifestationID)16432891 035 $a(PQKBTitleCode)TC0001653660 035 $a(PQKBWorkID)14982194 035 $a(PQKB)10018895 035 $a(DE-He213)978-3-319-29599-2 035 $a(MiAaPQ)EBC4398745 035 $a(PPN)192219723 035 $a(EXLCZ)993710000000596543 100 $a20160208d2016 u| 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aMicrofluidic Very Large Scale Integration (VLSI) $eModeling, Simulation, Testing, Compilation and Physical Synthesis /$fby Paul Pop, Wajid Hassan Minhass, Jan Madsen 205 $a1st ed. 2016. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2016. 215 $a1 online resource (277 p.) 300 $aDescription based upon print version of record. 311 $a3-319-29597-7 320 $aIncludes bibliographical references at the end of each chapters and index. 327 $aIntroduction -- Part 1. Preliminaries -- Design Methodology for Flow-based Microfluidic Biochips -- Biochip Architecture Model -- Biochemical Application Modeling -- Part 2. Compilation -- Compiling High-Level Languages -- Application Mapping and Simulation -- Control Synthesis and Pin-Count Minimization -- Part 3. Physical Design -- Allocation and Schematic Design -- Placement and Routing -- On-Chip Control Synthesis -- Testing and Fault-Tolerant Design. 330 $aThis book presents the state-of-the-art techniques for the modeling, simulation, testing, compilation and physical synthesis of mVLSI biochips. The authors describe a top-down modeling and synthesis methodology for the mVLSI biochips, inspired by microelectronics VLSI methodologies. They introduce a modeling framework for the components and the biochip architecture, and a high-level microfluidic protocol language. Coverage includes a topology graph-based model for the biochip architecture, and a sequencing graph to model for biochemical application, showing how the application model can be obtained from the protocol language. The techniques described facilitate programmability and automation, enabling developers in the emerging, large biochip market. · Presents the current models used for the research on compilation and synthesis techniques of mVLSI biochips in a tutorial fashion; · Includes a set of "benchmarks", that are presented in great detail and includes the source code of several of the techniques presented, including solutions to the basic compilation and synthesis problems; · Discusses several new research problems in detail, using numerous examples. 606 $aElectronic circuits 606 $aBiomedical engineering 606 $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068 606 $aBiomedical Engineering and Bioengineering$3https://scigraph.springernature.com/ontologies/product-market-codes/T2700X 606 $aElectronic Circuits and Devices$3https://scigraph.springernature.com/ontologies/product-market-codes/P31010 615 0$aElectronic circuits. 615 0$aBiomedical engineering. 615 14$aCircuits and Systems. 615 24$aBiomedical Engineering and Bioengineering. 615 24$aElectronic Circuits and Devices. 676 $a620 700 $aPop$b Paul$4aut$4http://id.loc.gov/vocabulary/relators/aut$0762874 702 $aMinhass$b Wajid Hassan$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aMadsen$b Jan$4aut$4http://id.loc.gov/vocabulary/relators/aut 906 $aBOOK 912 $a9910254248403321 996 $aMicrofluidic Very Large Scale Integration (VLSI)$92541952 997 $aUNINA