LEADER 03582nam 22005775 450 001 9910253963303321 005 20200706015724.0 010 $a3-319-27177-6 024 7 $a10.1007/978-3-319-27177-4 035 $a(CKB)3710000000602441 035 $a(EBL)4427516 035 $a(SSID)ssj0001653857 035 $a(PQKBManifestationID)16433476 035 $a(PQKBTitleCode)TC0001653857 035 $a(PQKBWorkID)14982205 035 $a(PQKB)11586286 035 $a(DE-He213)978-3-319-27177-4 035 $a(MiAaPQ)EBC4427516 035 $a(PPN)192219324 035 $a(EXLCZ)993710000000602441 100 $a20160223d2016 u| 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aSilicon Nanowire Transistors /$fby Ahmet Bindal, Sotoudeh Hamedi-Hagh 205 $a1st ed. 2016. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2016. 215 $a1 online resource (176 p.) 300 $aIncludes index. 311 $a3-319-27175-X 327 $aDual Work Function Silicon Nanowire MOS Transistors -- Single Work Function Silicon Nanowire MOS Transistors -- Spice Modeling For Analog and Digital Applications -- High-Speed Analog Applications -- Radio Frequency (RF) Applications -- SRAM Mega Cell Design for Digital Applications -- Field-Programmable-Gate-Array (FPGA) -- Integrate-And-Fire Spiking (IFS) Neuron -- Direct Sequence Spread Spectrum (DSSS) Base-Band Transmitter.-. 330 $aThis book describes the n and p-channel Silicon Nanowire Transistor (SNT) designs with single and dual-work functions, emphasizing low static and dynamic power consumption. The authors describe a process flow for fabrication and generate SPICE models for building various digital and analog circuits. These include an SRAM, a baseband spread spectrum transmitter, a neuron cell and a Field Programmable Gate Array (FPGA) platform in the digital domain, as well as high bandwidth single-stage and operational amplifiers, RF communication circuits in the analog domain, in order to show this technology?s true potential for the next generation VLSI. Describes Silicon Nanowire (SNW) Transistors, as vertically constructed MOS n and p-channel transistors, with low static and dynamic power consumption and small layout footprint; Targets System-on-Chip (SoC) design, supporting very high transistor count (ULSI), minimal power consumption requiring inexpensive substrates for packaging; Enables fabrication of different types of memory on the same chip, such as capacitive cells and transistors with floating gates that can be used as DRAMs and Flash memories. 606 $aElectronic circuits 606 $aNanotechnology 606 $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068 606 $aElectronic Circuits and Devices$3https://scigraph.springernature.com/ontologies/product-market-codes/P31010 606 $aNanotechnology$3https://scigraph.springernature.com/ontologies/product-market-codes/Z14000 615 0$aElectronic circuits. 615 0$aNanotechnology. 615 14$aCircuits and Systems. 615 24$aElectronic Circuits and Devices. 615 24$aNanotechnology. 676 $a620 700 $aBindal$b Ahmet$4aut$4http://id.loc.gov/vocabulary/relators/aut$0763513 702 $aHamedi-Hagh$b Sotoudeh$4aut$4http://id.loc.gov/vocabulary/relators/aut 906 $aBOOK 912 $a9910253963303321 996 $aSilicon Nanowire Transistors$92497670 997 $aUNINA