LEADER 02180nam  2200397   450 
001 9910220522703321
005 20231208181513.0
010   $a1-5044-1812-3
024 7 $a10.1109/IEEESTD.2017.8055462
035   $a(CKB)4100000000593498
035   $a(NjHacI)994100000000593498
035   $a(EXLCZ)994100000000593498
100   $a20231208d2017      uy             0
101 0 $aeng
135   $aur|||||||||||
181   $ctxt$2rdacontent
182   $cc$2rdamedia
183   $acr$2rdacarrier
200 10$aIEEE Std 1012-2016 (Revision of IEEE Std 1012-2012/ Incorporates IEEE Std 1012-2016/Cor1-2017) $eIEEE standard for system, software, and hardware verification and validation /$fInstitute of Electrical and Electronics Engineers
210  1$aNew York, New York :$cIEEE,$d2017.
215   $a1 online resource (260 pages)
225 1 $aIEEE Std ;$v1012-2016
330   $aVerification and validation (V&V) processes are used to determine whether the development products of a given activity conform to the requirements of that activity and whether the product satisfies its intended use and user needs. V&V life cycle process requirements are specified for different integrity levels. The scope of V&V processes encompasses systems, software, and hardware, and it includes their interfaces. This standard applies to systems, software, and hardware being developed, maintained, or reused (legacy, commercial off-the-shelf [COTS], non-developmental items). The term software also includes firmware and microcode, and each of the terms system, software, and hardware includes documentation. V&V processes include the analysis, evaluation, review, inspection, assessment, and testing of products.
410  0$aIEEE Std ;$v1012-2016.
517   $aIEEE Std 1012-2016 
606   $aComputer software$xVerification
606   $aComputer programs$xValidation
615  0$aComputer software$xVerification.
615  0$aComputer programs$xValidation.
676   $a005.14
801  0$bNjHacI
801  1$bNjHacl
906   $aDOCUMENT
912   $a9910220522703321
996   $aIEEE Std 1012-2016 (Revision of IEEE Std 1012-2012$92577137
997   $aUNINA