LEADER 05511nam 22006974a 450 001 9910145764203321 005 20200520144314.0 010 $a1-280-25336-3 010 $a9786610253364 010 $a0-470-35774-6 010 $a0-471-72621-4 010 $a0-471-72851-9 035 $a(CKB)1000000000013780 035 $a(EBL)226429 035 $a(SSID)ssj0000105563 035 $a(PQKBManifestationID)11140271 035 $a(PQKBTitleCode)TC0000105563 035 $a(PQKBWorkID)10101845 035 $a(PQKB)11439317 035 $a(Au-PeEL)EBL226429 035 $a(CaPaEBR)ebr10114147 035 $a(CaONFJC)MIL25336 035 $a(OCoLC)70720164 035 $a(CaSebORM)9780471469452 035 $a(MiAaPQ)EBC226429 035 $a(EXLCZ)991000000000013780 100 $a20031003d2004 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aArithmetic and logic in computer systems$b[electronic resource] /$fMi Lu 205 $a1st edition 210 $aHoboken, NJ $cWiley-Interscience$dc2004 215 $a1 online resource (270 p.) 225 1 $aWiley Series in Microwave and Optical Engineering ;$vv.169 300 $aDescription based upon print version of record. 311 $a0-471-46945-9 320 $aIncludes bibliographical references and index. 327 $aArithmetic and Logic in Computer Systems; Contents; Preface; List of Figures; List of Figures; List of Tables; List of Tables; About the Author; 1 Computer Number Systems; 1.1 Conventional Radix Number System; 1.2 Conversion of Radix Numbers; 1.3 Representation of Signed Numbers; 1.3.1 Sign-Magnitude; 1.3.2 Diminished Radix Complement; 1.3.3 Radix Complement; 1.4 Signed-Digit Number System; 1.1 Numbers Represented by 4 bits in Different Number Systems; 1.2 Finding Signed Digits; 1.5 Floating-point Number Representation; 1.5.1 Normalization; 1.5.2 Bias; 1.1 Floating-point Representation 327 $a1.2 Range of the Numbers1.3 Precision of Floating-Point Numbers; 1.4 Double Precision Floating-Point Representation; 1.3 Reserved Representation in IEEE Standard; 1.6 Residue Number System; 1.7 Logarithmic Number System; References; Problems; 2 Addition and Subtraction; 2.1 Single-Bit Adders; 2.1.1 Logical Devices; 2.1 AOI Function; 2.1 Delay Time and Area of Logic Gates; 2.2 Decoder and Multiplexer; 2.1.2 Single-Bit Half-Adder and Full-Adders; 2.3 Single-Bit Half-Adder; 2.2 Logic Function of a Half-Adder; 2.3 Logic Function of a Full-Adder; 2.4 Design of Full-Adder; 2.2 Negation 327 $a2.4 Single-Bit Subtractor2.2.1 Negation in One's Complement System; 2.5 Single-Bit Subtrator; 2.5 Negation in One's Complement System; 2.6 Negation in One's Complement System; 2.2.2 Negation in Two's Complement System; 2.7 Negation in Two's Complement System; 2.3 Subtraction through Addition; 2.8 Subtraction through Addition; 2.9 One-Bit Adder/Subtractor; 2.4 Over flow; 2.5 Ripple Carry Adders; 2.5.1 Two's Complement Addition; 2.10 Two's Complement Addition/Subtraction; 2.5.2 One's Complement Addition; 2.11 One's Complement Addition/Subtraction; 2.5.3 Sign-Magnitude Addition 327 $a2.12 Block Diagram of Sign-Magnitude Addition/SubtractionReferences; 2.13 Sign-Magnitude Addition/Subtraction; Problems; 3 High-Speed Adder; 3.1 Conditional-Sum Addition; 3.1 Conditional-Sum Addition; 3.2 Carry-Completion Sensing Addition; 3.2 Conditional-Sum Adder; 3.3 Generation and Transmission of Carries; 3.4 Construction of Carry-Completion Sensing Adder; 3.3 Carry-Lookahead Addition (CLA); 3.3.1 Carry-Lookahead Adder; 3.3.2 Block Carry Lookahead Adder; 3.5 Carry-Lookahead Adder; 3.6 Block Carry-Lookahead Adder; 3.4 Carry-Save Adders (CSA); 3.7 Carry-Save Adder; 3.8 Carry-Save Adder Tree 327 $a3.9 Two Types of Parallelization in Multi-Operand Addition3.5 Bit-Partitioned Multiple Addition; 3.1 Maximum Inputs of CSA Trees; 3.10 Bit-Partitioned Multiple Addition; References; Problems; 3.11 Carry-Completion Sensing Adder; 3.12 Carry-Save Adder; 3.13 Bit-Partitional Adder; 4 Sequential Multiplication; 4.1 Add-and-shift Approach; 4.1 Hardware for Sequential Multiplication; 4.2 Register Occupation; 4.2 Indirect Multiplication Schemes; 4.2. 1 Unsigned Number Multiplication; 4.2.2 Sign-Magnitude Number Multiplication; 4.2.3 One's Complement Number Multiplication 327 $a4.3 Unsigned Number Multiplication 330 $aArithmetic and Logic in Computer Systems provides a useful guide to a fundamental subject of computer science and engineering. Algorithms for performing operations like addition, subtraction, multiplication, and division in digital computer systems are presented, with the goal of explaining the concepts behind the algorithms, rather than addressing any direct applications. Alternative methods are examined, and explanations are supplied of the fundamental materials and reasoning behind theories and examples.No other current books deal with this subject, and the author is a leading authority 410 0$aWiley Series in Microwave and Optical Engineering 606 $aComputer arithmetic 606 $aLogic programming 615 0$aComputer arithmetic. 615 0$aLogic programming. 676 $a004/.01/51 700 $aLu$b Mi$0913136 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910145764203321 996 $aArithmetic and logic in computer systems$92045595 997 $aUNINA