LEADER 04747nam 22006735 450 001 9910502588603321 005 20250811071653.0 010 $a3-030-88885-1 024 7 $a10.1007/978-3-030-88885-5 035 $a(CKB)5100000000044199 035 $a(MiAaPQ)EBC6768758 035 $a(Au-PeEL)EBL6768758 035 $a(OCoLC)1281956231 035 $a(PPN)258296186 035 $a(DE-He213)978-3-030-88885-5 035 $a(EXLCZ)995100000000044199 100 $a20211013d2021 u| 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aAutomated Technology for Verification and Analysis $e19th International Symposium, ATVA 2021, Gold Coast, QLD, Australia, October 18?22, 2021, Proceedings /$fedited by Zhe Hou, Vijay Ganesh 205 $a1st ed. 2021. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2021. 215 $a1 online resource (384 pages) 225 1 $aProgramming and Software Engineering,$x2945-9168 ;$v12971 311 08$a3-030-88884-3 327 $aInvited Paper -- Linear Temporal Logic ­ ? From Infinite to Finite Horizon -- Automata Theory -- Determinization and Limit-determinization of Emerson-Lei automata -- Automatic discovery of fair paths in infinite-state transition systems -- Certifying DFA Bounds for Recognition and Separation -- Machine Learning for Formal Methods -- AALpy: An Active Automata Learning Library -- Learning Linear Temporal Properties from Noisy Data: A MaxSAT-based Approach -- Mining Interpretable Spatio-temporal Logic Properties for Spatially Distributed Systems -- Theorem Proving and Tools -- A Formal Semantics of the GraalVM Intermediate Representation -- A Verified Decision Procedure for Orders in Isabelle/HOL -- PJBDD: A BDD Library for Java and Multi-Threading -- Model Checking -- Live Synthesis -- Faster Pushdown Reachability Analysis with Applications in Network Verification -- Verifying Verified Code -- Probabilistic Analysis -- Probabilistic causes in Markov Chains -- TEMPEST - Synthesis Tool for Reactive Systems and Shields in Probabilistic Environments -- AQUA: Automated Quantized Inference for Probabilistic Programs -- Software and Hardware Verification -- Proving SIFA Protection of Masked Redundant Circuits -- Verification by Gambling on Program Slices -- Runtime Enforcement of Hyperproperties -- System Synthesis and Approximation -- Compositional Synthesis of Modular Systems -- Event-B Refinement for Continuous Behaviours Approximation -- Incorporating Monitors in Reactive Synthesis without Paying the Price -- Verification of Machine Learning -- pyNever: a Framework for Learning and Verification of Neural Networks -- Property-Directed Verification and Robustness Certification of Recurrent Neural Networks. 330 $aThis book constitutes the refereed proceedings of the 19th International Symposium on Automated Technology for Verification and Analysis, ATVA 2021, held in Gold Coast, Australia in October 2021. The symposium is dedicated to promoting research in theoretical and practical aspects of automated analysis, verification and synthesis by providing an international venue for the researchers to present new results. The 19 regular papers presented together with 4 tool papers and 1 invited paper were carefully reviewed and selected from 75 submissions. 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