LEADER 01269nas 2200397-a 450 001 9910141547203321 005 20240413021851.0 011 $a1689-3786 035 $a(CKB)110975506070989 035 $a(CONSER)sn-91025903- 035 $a(EXLCZ)99110975506070989 100 $a19910123a19909999 --- a 101 0 $aeng 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 00$aGenus 210 $aWroc?aw, Poland $cBiologica Silesae$d1990- 215 $a1 online resource 300 $aTitle from cover. 311 $aPrint version: Genus (Wroc?aw, Poland) (DLC)sn-91025903- (OCoLC)23000794 0867-1710 531 $aGENUS (WROC) 606 $aInvertebrates$xClassification$vPeriodicals 606 $aBiology$xClassification$vPeriodicals 606 $aBiology$xClassification$2fast$3(OCoLC)fst00832393 606 $aInvertebrates$xClassification$2fast$3(OCoLC)fst00978115 608 $aPeriodicals.$2fast 615 0$aInvertebrates$xClassification 615 0$aBiology$xClassification 615 7$aBiology$xClassification. 615 7$aInvertebrates$xClassification. 906 $aJOURNAL 912 $a9910141547203321 920 $aexl_impl conversion 996 $aGenus$9795551 997 $aUNINA LEADER 03710nam 2200673 a 450 001 9910438050203321 005 20200520144314.0 010 $a9781283640770 010 $a1283640775 010 $a9789048196449 010 $a9048196442 024 7 $a10.1007/978-90-481-9644-9 035 $a(CKB)3400000000086400 035 $a(EBL)1030225 035 $a(OCoLC)811773504 035 $a(SSID)ssj0000766987 035 $a(PQKBManifestationID)11445962 035 $a(PQKBTitleCode)TC0000766987 035 $a(PQKBWorkID)10739607 035 $a(PQKB)10868799 035 $a(DE-He213)978-90-481-9644-9 035 $a(MiAaPQ)EBC1030225 035 $a(PPN)168335204 035 $a(EXLCZ)993400000000086400 100 $a20120705d2013 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aDesign, analysis and test of logic circuits under uncertainty /$fSmita Krishnaswamy, Igor L. Markov, John P. Hayes 205 $a1st ed. 2013. 210 $aNew York $cSpringer$d2013 215 $a1 online resource (129 p.) 225 0$aLecture notes in electrical engineering,$x1876-1100 ;$vv. 115 300 $aDescription based upon print version of record. 311 08$a9789400797987 311 08$a9400797982 311 08$a9789048196432 311 08$a9048196434 320 $aIncludes bibliographical references and index. 327 $aIntroduction -- Probabilistic Transfer Matrices -- Computing with Probabilistic Transfer Matrices -- Testing Logic Circuits for Probabilistic Faults -- Signtaure-based Reliability Analysis -- Design for Robustness -- Summary and Extensions. 330 $aIntegrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits.  To improve future semiconductor designs, this book describes methods for analyzing, designing, and testing circuits subject to probabilistic effects. The authors first develop techniques to model inherently probabilistic methods in logic circuits and to test circuits for determining their reliability after they are manufactured. Then, they study error-masking mechanisms intrinsic to digital circuits and show how to leverage them to design more reliable circuits.  The book describes techniques for:   ? Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework;   ? Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-level optimizations;   ? Logic synthesis for greater resilience against soft errors, which improves reliability using moderate overhead in area and performance;   ? Test-generation and test-compaction methods aimed at probabilistic faults in logic circuits that facilitate accurate and efficient post-manufacture measurement of soft-error susceptibility. 410 0$aLecture Notes in Electrical Engineering,$x1876-1100 ;$v115 606 $aLogic circuits 606 $aUncertainty (Information theory) 615 0$aLogic circuits. 615 0$aUncertainty (Information theory) 676 $a621.395 700 $aKrishnaswamy$b Smita$01060838 701 $aMarkov$b Igor L$01750207 701 $aHayes$b John P$g(John Patrick),$f1944-$01762476 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910438050203321 996 $aDesign, analysis and test of logic circuits under uncertainty$94202462 997 $aUNINA