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101 0 $aeng
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181   $ctxt
182   $cc
183   $acr
200 10$a2010 IEEE National Aerospace and Electronics Conference
210 31$a[Place of publication not identified]$cI E E E$d2010
215   $a1 online resource
300   $aBibliographic Level Mode of Issuance: Monograph
311 08$a9781424465767 
311 08$a1424465761 
330   $aThis paper describes the development of a software tool for simulating and generating fully parallel generic VHDL representations of Fast Fourier Transforms. Several fixed-point number optimizations are described with emphasis on maximizing speed and/or minimizing FPGA area. Twiddle factor bit precision and its effects on FPGA area usage are also explored.
606   $aWireless sensor networks
615  0$aWireless sensor networks.
676   $a681.2
702   $aIEEE Staff
801  0$bPQKB
906   $aPROCEEDING
912   $a9910141046003321
996   $a2010 IEEE National Aerospace and Electronics Conference$92522716
997   $aUNINA