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101 0 $aeng
135   $aur|||||||||||
181   $ctxt
182   $cc
183   $acr
200 10$a2010 22nd International Symposium on Computer Architecture and High Performance Computing Workshops
210 31$a[Place of publication not identified]$cIEEE$d2010
215   $a1 online resource
300   $aBibliographic Level Mode of Issuance: Monograph
311 08$a9781424488773 
311 08$a142448877X 
330   $aMulticore architectures are an important contribution in computing technology since they are capable of providing more processing power with better cost-benefit than single-core processors. Cores execute instructions independently but share critical resources such as L2 cache memory and data channels. Clusters using multicore architectures or multiprocessors chips (MPC's) suggest a hierarchical memory environment. Parallel applications should take advantage of such memory hierarchy to achieve high performance. This paper presents a performance analysis of a synthetic application in a multicore cluster and introduces a preliminary architecture model that considers communication through both shared memory and data channels and its impact on the application performance.
606   $aComputer architecture$vCongresses
615  0$aComputer architecture
676   $a004.22
702   $aieee
801  0$bPQKB
906   $aPROCEEDING
912   $a9910140891803321
996   $a2010 22nd International Symposium on Computer Architecture and High Performance Computing Workshops$92423988
997   $aUNINA