LEADER 01869nam 2200361 450 001 9910135759703321 005 20231206190612.0 010 $a0-7381-4016-3 010 $a0-7381-1061-2 024 7 $a10.1109/IEEESTD.1972.81621 035 $a(CKB)3780000000089265 035 $a(NjHacI)993780000000089265 035 $a(EXLCZ)993780000000089265 100 $a20231206d1972 uy 0 101 0 $aeng 135 $aur||||||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aANSI/IEEE Std C37.26.1972 /$fInstitute of Electrical and Electronics Engineers 210 1$aPiscataway, NJ :$cIEEE,$d1972. 215 $a1 online resource (12 pages) 330 $aMethods used to measure the power factor in low-voltage test circuits are covered. Since the power factor measurement for high-capacity test circuits is particularly difficult, and different methods may yield different results, the methods that are least likely to yield errors are recommended for particular circuit conditions. The ratio method is recommended for fast clearing devices that may have total interruption times of 0.5 cycle or less. The DC decrement method is recommended for circuits with a 30% power factor or less when the device to be tested interrupts at a point in time more than 0.5 cycle from the initiation of the current. The phase relationship method, using current and voltage waves, is recommended for circuits having power factors over 30%. 517 $aANSI/IEEE Std C37.26.1972: IEEE Standard Guide for Methods of Power-Factor Measurement for Low-Voltage Inductive Test Circuits 606 $aElectric circuits 615 0$aElectric circuits. 676 $a621.3192 801 0$bNjHacI 801 1$bNjHacl 906 $aDOCUMENT 912 $a9910135759703321 996 $aANSI$92072434 997 $aUNINA