LEADER 01728nam  2200409   450 
001 9910135265503321
005 20231208083634.0
010   $a0-7381-0709-3
024 7 $a10.1109/IEEESTD.1976.120779
035   $a(CKB)3780000000092174
035   $a(NjHacI)993780000000092174
035   $a(EXLCZ)993780000000092174
100   $a20231208d1976      uy             0
101 0 $aeng
135   $aur|||||||||||
181   $ctxt$2rdacontent
182   $cc$2rdamedia
183   $acr$2rdacarrier
200 10$aANSI/IEEE Std 683-1976 $eIEEE recommended practice for block transfers in CAMAC systems /$fInstitute of Electrical and Electronics Engineers
210  1$aPiscataway, New Jersey :$cIEEE,$d1976.
215   $a1 online resource (19 pages)
330   $aThe recommended block-transfer algorithms are discussed, and those given in the basic CAMAC specification are described. These algorithms are well established and are supported by existing hardware. Some new algorithms are then discussed. Compatibility, hardware design, and software considerations are addressed.
517   $a683-1976 - IEEE Recommended Practice for Block Transfers in CAMAC Systems 
517   $aANSI/IEEE Std 683-1976: IEEE Recommended Practice for Block Transfers in CAMAC Systems
606   $aElectrical engineering$xStandards
606   $aComputer interfaces$xStandards
606   $aProcess control$xData processing
615  0$aElectrical engineering$xStandards.
615  0$aComputer interfaces$xStandards.
615  0$aProcess control$xData processing.
676   $a621.3
801  0$bNjHacI
801  1$bNjHacl
906   $aDOCUMENT
912   $a9910135265503321
996   $aANSI$92072434
997   $aUNINA