LEADER 05401nam 2200697 450 001 9910132198403321 005 20200520144314.0 010 $a1-118-62544-7 010 $a1-118-64895-1 010 $a1-118-64894-3 035 $a(CKB)3710000000125466 035 $a(EBL)1706869 035 $a(OCoLC)881416971 035 $a(SSID)ssj0001305105 035 $a(PQKBManifestationID)11727933 035 $a(PQKBTitleCode)TC0001305105 035 $a(PQKBWorkID)11248483 035 $a(PQKB)11416525 035 $a(OCoLC)882248455 035 $a(Au-PeEL)EBL1706869 035 $a(CaPaEBR)ebr10879734 035 $a(CaONFJC)MIL621888 035 $a(CaSebORM)9781118648957 035 $a(MiAaPQ)EBC1706869 035 $a(PPN)191455768 035 $a(EXLCZ)993710000000125466 100 $a20140619h20142014 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aAdvanced backend code optimization /$fSid Touati, Benoit Dupont de Dinechin 205 $a1st edition 210 1$aLondon ;$aHoboken, New Jersey :$cISTE :$cWiley,$d2014. 210 4$dİ2014 215 $a1 online resource (386 p.) 225 1 $aComputer Engineering Series 300 $aDescription based upon print version of record. 311 $a1-84821-538-X 320 $aIncludes bibliographical references and index. 327 $aCover; Title Page; Copyright; Contents; Introduction; Part 1. Prolog: Optimizing Compilation; Chapter 1. On The Decidability Of Phase Ordering In Optimizing Compilation; 1.1. Introduction to the phase ordering problem; 1.2. Background on phase ordering; 1.2.1. Performance modeling and prediction; 1.2.2. Some attempts in phase ordering; 1.3. Toward a theoretical model for the phase ordering problem; 1.3.1. Decidability results; 1.3.2. Another formulation of the phase ordering problem; 1.4. Examples of decidable simplified cases; 1.4.1. Models with compilation costs 327 $a1.4.2. One-pass generative compilers1.5. Compiler optimization parameter space exploration; 1.5.1. Toward a theoretical model; 1.5.2. Examples of simplified decidable cases; 1.6. Conclusion on phase ordering in optimizing compilation; Part 2. Instruction Scheduling; Chapter 2. Instruction Scheduling Problems And Overview; 2.1. VLIW instruction scheduling problems; 2.1.1. Instruction scheduling and register allocation in a code generator; 2.1.2. The block and pipeline VLIW instruction scheduling problems; 2.2. Software pipelining; 2.2.1. Cyclic, periodic and pipeline scheduling problems 327 $a2.2.2. Modulo instruction scheduling problems and techniques2.3. Instruction scheduling and register allocation; 2.3.1. Register instruction scheduling problem solving approaches; Chapter 3. Applications Of Machine Scheduling To Instruction Scheduling; 3.1. Advances in machine scheduling; 3.1.1. Parallel machine scheduling problems; 3.1.2. Parallel machine scheduling extensions and relaxations; 3.2. List scheduling algorithms; 3.2.1. List scheduling algorithms and list scheduling priorities; 3.2.2. The scheduling algorithm of Leung, Palem and Pnueli 327 $a3.3. Time-indexed scheduling problem formulations3.3.1. The non-preemptive time-indexed RCPSP formulation; 3.3.2. Time-indexed formulation for the modulo RPISP; Chapter 4. Instruction Scheduling Before Register Allocation; 4.1. Instruction scheduling for an ILP processor: case of a VLIW architecture; 4.1.1. Minimum cumulative register lifetime modulo scheduling; 4.1.2. Resource modeling in instruction scheduling problems; 4.1.3. The modulo insertion scheduling theorems; 4.1.4. Insertion scheduling in a backend compiler 327 $a4.1.5. Example of an industrial production compiler from STMicroelectronics4.1.6. Time-indexed formulation of the modulo RCISP; 4.2. Large neighborhood search for the resource-constrained modulo scheduling problem; 4.3. Resource-constrained modulo scheduling problem; 4.3.1. Resource-constrained cyclic scheduling problems; 4.3.2. Resource-constrained modulo scheduling problem statement; 4.3.3. Solving resource-constrained modulo scheduling problems; 4.4. Time-indexed integer programming formulations; 4.4.1. The non-preemptive time-indexed RCPSP formulation 327 $a4.4.2. The classic modulo scheduling integer programming formulation 330 $aThis book is a summary of more than a decade of research in the area of backend optimization. It contains the latest fundamental research results in this field. While existing books are often more oriented toward Masters students, this book is aimed more towards professors and researchers as it contains more advanced subjects.It is unique in the sense that it contains information that has not previously been covered by other books in the field, with chapters on phase ordering in optimizing compilation; register saturation in instruction level parallelism; code size reduction for softw 410 0$aComputer engineering series. 606 $aCompilers (Computer programs) 615 0$aCompilers (Computer programs) 676 $a004.24 700 $aTouati$b Sid$0889680 702 $aDupont de Dinechin$b Benoit 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910132198403321 996 $aAdvanced backend code optimization$91987801 997 $aUNINA