LEADER 01270nam0-2200397---450- 001 990010077640403321 005 20160620120511.0 010 $a978-0471-68783-2 035 $a001007764 035 $aFED01001007764 035 $a(Aleph)001007764FED01 035 $a001007764 100 $a20160531d2006----km-y0itay50------ba 101 0 $aeng 102 $aUS 105 $a--------001yy 200 1 $aSynthesis of arithmetic circuits$eFPGA, ASIC, and embedded systems$fJean Pierre deschamps, Géry Jean Antoine Bioul, Gustavo D. Sutter 210 $aHoboken (N.J.)$cWiley Interscience$cJohn Wiley & Sons Inc. Publication$d2006 215 $aXIX, 556 p.$d24 cm 610 0 $aMicroelaboratori elettronici 676 $a621.395 700 1$aDeschamps,$bJean-Pierre 701 1$aBioul,$bGéry Jean Antoine 701 1$aSutter,$bGustavo D. 801 0$aIT$bUNINA$gRICA$2UNIMARC 901 $aBK 912 $a990010077640403321 952 $a13 61 51$b0619 / 2016$fFINBC 952 $a13 H 64 19$b0620 / 2016$fFINBC 952 $a13 H 64 20$b0621 / 2016$fFINBC 952 $a23 13 E 22$b0622 / 2016$fFINAG 952 $a23 13 E 23$b0623 / 2016$fFINAG 952 $a23 13 E 24$b0624 / 2016$fFINAG 959 $aFINBC 959 $aFINAG 997 $aUNINA