LEADER 01269nam0 22003133i 450 001 VAN0109126 005 20230615022434.675 010 $a978-14-614-0820-8 017 70$2N$a978-1-4614-0821-5 100 $a20170511d2015 |0itac50 ba 101 $aeng 102 $aUS 105 $a|||| ||||| 200 1 $aMulti-Net Optimization of VLSI Interconnect$fKonstantin Moiseev, Avinoam Kolodny, Shmuel Wimer 210 $aNew York$cSpringer$d2015 215 $axvi, 233 p.$cill.$d24 cm 620 $aUS$dNew York$3VANL000011 700 1$aMoiseev$bKonstantin$3VANV084405$0739754 701 1$aKolodny$bAvinoam$3VANV084406$0739755 701 1$aWimer$bShmuel$3VANV084407$0739756 712 $aSpringer $3VANV108073$4650 801 $aIT$bSOL$c20240614$gRICA 856 4 $uhttps://link.springer.com/book/10.1007/978-1-4614-0821-5$zE-book ? Accesso al full-text attraverso riconoscimento IP di Ateneo, proxy e/o Shibboleth 899 $aBIBLIOTECA CENTRO DI SERVIZIO SBA$2VAN15 912 $fN 912 $aVAN0109126 950 $aBIBLIOTECA CENTRO DI SERVIZIO SBA$d15CONS SBA EBOOK 1148 $e15EB 1148 20170511 996 $aMulti-Net Optimization of VLSI Interconnect$91465801 997 $aUNICAMPANIA