LEADER 01388nam0 22003013i 450 001 VAN00119929 005 20240806100805.791 017 70$2N$a978-81-322-2520-1 100 $a20190201d2016 |0itac50 ba 101 $aeng 102 $aIN 105 $a|||| ||||| 200 1 $aHigh Performance Integer Arithmetic Circuit Design on FPGA$eArchitecture, Implementation and Design Automation$fAyan Palchaudhuri, Rajat Subhra Chakraborty 210 $aNew Delhi$cSpringer$d2016 215 $axvii, 114 p.$d24 cm 410 1$1001VAN00063131$12001 $aSpringer series in advanced microelectronics$1210 $aBerlin [etc.]$cSpringer$v51 620 $aIN$dNew Delhi$3VANL001098 700 1$aPalchaudhuri$bAyan$3VANV092149$0762266 701 1$aChakraborty$bRajat Subhra$3VANV092150$0762267 712 $aSpringer $3VANV108073$4650 801 $aIT$bSOL$c20240906$gRICA 856 4 $uhttps://link.springer.com/book/10.1007/978-81-322-2520-1$zE-book ? Accesso al full-text attraverso riconoscimento IP di Ateneo, proxy e/o Shibboleth 899 $aBIBLIOTECA CENTRO DI SERVIZIO SBA$2VAN15 912 $fN 912 $aVAN00119929 950 $aBIBLIOTECA CENTRO DI SERVIZIO SBA$d15CONS SBA EBOOK 3096 $e15EB 3096 20190201 996 $aHigh Performance Integer Arithmetic Circuit Design on FPGA$91545079 997 $aUNICAMPANIA