LEADER 01228nam0 2200325 450 001 000040064 005 20150122101946.0 010 $a0-19-814858-5 100 $a20150112d1984----km-y0itaa50------ba 101 0 $aeng 102 $aGB 200 1 $aCaesar Augustus$eseven aspects$fedited by Fergus Millar and Erich Segal 210 $aOxford$cClarendon Press$d1984 215 $aX, 221 p.$d22 cm 225 2 $aClarendon paperbacks 410 0$12001$aClarendon paperbacks 600 1$aAugusto,$bCaio Giulio Cesare Ottaviano, imperatore romano 676 $a937.07$v(22 ed.)$9Storia della penisola italiana e territori limitrofi, fino al 476. Primo periodo e periodo intermedio, 31 a.C.-284 702 1$aMillar,$bFergus 702 1$aSegal,$bErich 801 0$aIT$bUniversità della Basilicata - B.I.A.$gREICAT$2unimarc 912 $a000040064 996 $aCaesar Augustus$9105159 997 $aUNIBAS BAS $aLETTERE CAT $aEXT017$b01$c20150112$lBAS01$h1031 CAT $aEXT017$b01$c20150116$lBAS01$h1112 CAT $aTTM$b30$c20150122$lBAS01$h1019 FMT Z30 -1$lBAS01$LBAS01$mBOOK$1BASA1$APolo Storico-Umanistico$2DID$BDidattica$3FM/113166$6113166$5L113166$820150112$f04$FPrestabile Didattica LEADER 01484nam 2200349 450 001 9910349358003321 005 20231209100043.0 010 $a0-7381-4777-X 024 7 $a10.1109/IEEESTD.2002.8894283 035 $a(CKB)4100000009825465 035 $a(NjHacI)994100000009825465 035 $a(EXLCZ)994100000009825465 100 $a20231209d2002 uy 0 101 0 $aeng 135 $aur||||||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$a62142-2005 - IEC/IEEE iInternational standard - Verilog(R) Register Transfer Level synthesis /$fInstitute of Electrical and Electronics Engineers 210 1$aNew York, New York :$cIEEE,$d2002. 215 $a1 online resource (116 pages) 330 $aReplaces IEEE Std 1364.1-2002. To develop a standard syntax and semantics for Verilog RTL synthesis. This standard shall define the subset of IEEE 1364 (Verilog HDL) which is suitable for RTL synthesis and shall define the semantics of that subset for the synthesis domain. This standard shall be based on the current existing standard IEEE 1364. 517 $a62142-2005 - IEC/IEEE International Standard - Verilog 606 $aVHDL (Computer hardware description language) 615 0$aVHDL (Computer hardware description language) 676 $a621.392 801 0$bNjHacI 801 1$bNjHacl 906 $aDOCUMENT 912 $a9910349358003321 996 $a62142-2005 - IEC$92581352 997 $aUNINA