01122nam0 22002291i 450 VAN004532420221202034521.17320060524d1936 |0itac50 baitaIT|||| |||||ˆLa ‰nuova legge sul decreto d'ingiunzione per pagamenti di crediti, consegna di merci e di cose, sfratti per finita locazione e per morositacon commento, note giurisprudenziali, relazione ministeriale e formolarioFilippo BianchiMilanopresso l'A.1936206 p.19 cmMilanoVANL000284BianchiFilippoVANV036474625816ITSOL20221209RICABIBLIOTECA DEL DIPARTIMENTO DI GIURISPRUDENZAIT-CE0105VAN00VAN0045324BIBLIOTECA DEL DIPARTIMENTO DI GIURISPRUDENZA00CONS XVI.Eb.127 00FP 27869 20060918 Fondo Raffaele PapaNuova legge sul decreto d'ingiunzione per pagamenti di crediti, consegna di merci e di cose, sfratti per finita locazione e per morosita1422531UNISOB01136nam 2200313Ia 450 99638628680331620221108044704.0(CKB)4940000000081751(EEBO)2240954428(OCoLC)15057440(EXLCZ)99494000000008175119870112d1672 uy |engurbn||||a|bb|Youths tragedy[electronic resource] a poem drawn up by way of dialogue between [brace] Youth, the Devil, Wisdom [brace] Time, Death, the Soul, the Nuncius : for the caution and direction of the younger sort /by T.SThe fourth edition.London Printed for John Starkey ... and Francis Smith ...1672[2], 30 pIn verse.Imperfect: pages stained with loss of print.Reproduction of original in the University of Illinois (Urbana-Champaign Campus). Library.eebo-0167T. S(Thomas Sherman)1003277EAFWaOLNBOOK996386286803316Youths tragedy2303366UNISA05233nam 2200637 a 450 991083074480332120230721030242.01-281-00216-X97866110021690-470-12521-70-470-12520-9(CKB)1000000000376972(EBL)315213(OCoLC)180191752(SSID)ssj0000227399(PQKBManifestationID)11175697(PQKBTitleCode)TC0000227399(PQKBWorkID)10264309(PQKB)11537372(MiAaPQ)EBC315213(EXLCZ)99100000000037697220061004d2007 uy 0engur|n|---|||||txtccrPrinciples of modern digital design[electronic resource] /Parag K. LalaHoboken, N.J. Wiley-Intersciencec20071 online resource (437 p.)Description based upon print version of record.0-470-07296-2 Includes bibliographical references and index.PRINCIPLES OF MODERN DIGITAL DESIGN; CONTENTS; Preface; 1 Number Systems and Binary Codes; 1.1 Introduction; 1.2 Decimal Numbers; 1.3 Binary Numbers; 1.3.1 Basic Binary Arithmetic; 1.4 Octal Numbers; 1.5 Hexadecimal Numbers; 1.6 Signed Numbers; 1.6.1 Diminished Radix Complement; 1.6.2 Radix Complement; 1.7 Floating-Point Numbers; 1.8 Binary Encoding; 1.8.1 Weighted Codes; 1.8.2 Nonweighted Codes; Exercises; 2 Fundamental Concepts of Digital Logic; 2.1 Introduction; 2.2 Sets; 2.3 Relations; 2.4 Partitions; 2.5 Graphs; 2.6 Boolean Algebra; 2.7 Boolean Functions2.8 Derivation and Classification of Boolean Functions2.9 Canonical Forms of Boolean Functions; 2.10 Logic Gates; Exercises; 3 Combinational Logic Design; 3.1 Introduction; 3.2 Minimization of Boolean Expressions; 3.3 Karnaugh Maps; 3.3.1 Don't Care Conditions; 3.3.2 The Complementary Approach; 3.4 Quine-MCCluskey Method; 3.4.1 Simplification of Boolean Function with Don't Cares; 3.5 Cubical Representation of Boolean Functions; 3.5.1 Tautology; 3.5.2 Complementation Using Shannon's Expansion; 3.6 Heuristic Minimization of Logic Circuits; 3.6.1 Expand; 3.6.2 Reduce; 3.6.3 Irredundant3.6.4 Espresso3.7 Minimization of Multiple-Output Functions; 3.8 NAND-NAND and NOR-NOR Logic; 3.8.1 NAND-NAND Logic; 3.8.2 NOR-NOR Logic; 3.9 Multilevel Logic Design; 3.9.1 Algebraic and Boolean Division; 3.9.2 Kernels; 3.10 Minimization of Multilevel Circuits Using Don't Cares; 3.10.1 Satisfiability Don't Cares; 3.10.2 Observability Don't Cares; 3.11 Combinational Logic Implementation Using EX-OR and AND Gates; 3.12 Logic Circuit Design Using Multiplexers and Decoders; 3.12.1 Multiplexers; 3.12.2 Demultiplexers and Decoders; 3.13 Arithmetic Circuits; 3.13.1 Half-Adders; 3.13.2 Full Adders3.13.3 Carry-Lookahead Adders3.13.4 Carry-Select Adder; 3.13.5 Carry-Save Addition; 3.13.6 BCD Adders; 3.13.7 Half-Subtractors; 3.13.8 Full Subtractors; 3.13.9 Two's Complement Subtractors; 3.13.10 BCD Substractors; 3.13.11 Multiplication; 3.13.12 Comparator; 3.14 Combinational Circuit Design Using PLDs; 3.14.1 PROM; 3.14.2 PLA; 3.14.3 PAL; Exercises; References; 4 Fundamentals of Synchronous Sequential Circuits; 4.1 Introduction; 4.2 Synchronous and Asynchronous Operation; 4.3 Latches; 4.4 Flip-Flops; 4.4.1 D Flip-Flop; 4.4.2 JK Flip-Flop; 4.4.3 T Flip-Flop4.5 Timing in Synchronous Sequential Circuits4.6 State Tables and State Diagrams; 4.7 Mealy and Moore Models; 4.8 Analysis of Synchronous Sequential Circuits; Exercises; References; 5 VHDL in Digital Design; 5.1 Introduction; 5.2 Entity and Architecture; 5.2.1 Entity; 5.2.2 Architecture; 5.3 Lexical Elements in VHDL; 5.4 Data Types; 5.5 Operators; 5.6 Concurrent and Sequential Statements; 5.7 Architecture Description; 5.8 Structural Description; 5.9 Behavioral Description; 5.10 RTL Description; Exercises; 6 Combinational Logic Design Using VHDL; 6.1 Introduction6.2 Concurrent Assignment StatementsA major objective of this book is to fill the gap between traditional logic design principles and logic design/optimization techniques used in practice. Over the last two decades several techniques for computer-aided design and optimization of logic circuits have been developed. However, underlying theories of these techniques are inadequately covered or not covered at all in undergraduate text books. This book covers not only the ""classical"" material found in current text books but also selected materials that modern logic designers need to be familiar with.Logic designLogic circuitsDesign and constructionDigital electronicsLogic design.Logic circuitsDesign and construction.Digital electronics.621.395621.39732Lala Parag K.1948-9381MiAaPQMiAaPQMiAaPQBOOK9910830744803321Principles of modern digital design4013154UNINA