11019nam 2200529 450 991055307290332120221106233457.09783030934491(electronic bk.)9783030934484(MiAaPQ)EBC6934405(Au-PeEL)EBL6934405(CKB)21412766500041(PPN)261524763(EXLCZ)992141276650004120221106d2022 uy 0engurcnu||||||||txtrdacontentcrdamediacrrdacarrierComputer systems digital design, fundamentals of computer architecture and assembly language /Ata ElahiSecond edition.Cham, Switzerland :Springer Nature Switzerland AG,[2022]©20221 online resource (307 pages)Print version: Elahi, Ata Computer Systems Cham : Springer International Publishing AG,c2022 9783030934484 Includes bibliographical references and index.Intro -- Preface -- Intended Audience -- Organization -- Acknowledgments -- Contents -- Chapter 1: Signals and Number Systems -- 1.1 Introduction -- 1.1.1 CPU -- 1.1.1.1 CPU Execute Program -- Input Device -- Output Device -- Memory -- 1.2 Historical Development of the Computer -- 1.3 Hardware and Software Components of a Computer -- 1.4 Types of Computers -- 1.5 Analog Signals -- 1.5.1 Characteristics of an Analog Signal -- 1.6 Digital Signals -- 1.7 Number System -- 1.7.1 Converting from Binary to Decimal -- 1.7.2 Converting from Decimal Integer to Binary -- 1.7.3 Converting Decimal Fraction to Binary -- 1.7.4 Converting from Hex to Binary -- 1.7.5 Binary Addition -- 1.8 Complement and Two´s Complement -- 1.8.1 Subtraction of Unsigned Number Using Two´s Complement -- 1.9 Unsigned, Signed Magnitude, and Signed Two´s Complement Binary Number -- 1.9.1 Unsigned Number -- 1.9.2 Signed Magnitude Number -- 1.9.3 Signed Two´s Complement -- 1.10 Binary Addition Using Signed Two´s Complement -- 1.11 Floating Point Representation -- 1.11.1 Single and Double Precision Representations of Floating Point -- 1.11.1.1 Biased Exponent -- 1.11.1.2 Normalized Mantissa -- 1.11.1.3 Double Precision -- 1.12 Binary-Coded Decimal (BCD) -- 1.13 Coding Schemes -- 1.13.1 ASCII Code -- 1.13.2 Universal Code or Unicode -- 1.14 Parity Bit -- 1.14.1 Even Parity -- 1.14.2 Odd Parity -- 1.15 Clock -- 1.16 Transmission Modes -- 1.16.1 Asynchronous Transmission -- 1.16.2 Synchronous Transmission -- 1.17 Transmission Methods -- 1.17.1 Serial Transmission -- 1.17.2 Parallel Transmission -- 1.18 Summary -- Chapter 2: Boolean Logics and Logic Gates -- 2.1 Introduction -- 2.2 Boolean Logics and Logic Gates -- 2.2.1 AND Logic -- 2.2.2 OR Logic -- 2.2.3 NOT Logic -- 2.2.4 NAND Gate -- 2.2.5 NOR Gate -- 2.2.6 Exclusive OR Gate -- 2.2.7 Exclusive NOR Gate -- 2.2.8 Tri-State Device.2.2.9 Multiple Inputs Logic Gates -- 2.3 Integrated Circuit (IC) Classifications -- 2.3.1 Small-Scale Integration (SSI) -- 2.3.2 Integrated Circuit Pins Numbering -- 2.3.3 Medium-Scale Integration (MSI) -- 2.3.4 Large-Scale Integration (LSI) -- 2.3.5 Very-Large-Scale Integration (VLSI) -- 2.4 Boolean Algebra Theorems -- 2.4.1 Distributive Theorem -- 2.4.2 De Morgan´s Theorem I -- 2.4.3 De Morgan´s Theorem II -- 2.4.4 Commutative Law -- 2.4.5 Associative Law -- 2.4.6 More Theorems -- 2.5 Boolean Function -- 2.5.1 Complement of a Function -- 2.6 Summary -- Problems -- Chapter 3: Minterms, Maxterms, Karnaugh Map (K-Map), and Universal Gates -- 3.1 Introduction -- 3.2 Minterms -- 3.2.1 Application of Minterms -- 3.2.2 Three-Variable Minterms -- 3.3 Maxterms -- 3.4 Karnaugh Map (K-Map) -- 3.4.1 Three-Variable Map -- 3.4.2 Four-Variable K-Map -- 3.5 Sum of Products (SOP) and Product of Sums (POS) -- 3.6 Don´t Care Conditions -- 3.7 Universal Gates -- 3.7.1 Using NAND Gates -- 3.7.2 Using NOR Gates -- 3.7.3 Implementation of Logic Functions Using NAND Gates or NOR Gates Only -- 3.7.4 Using NAND Gates -- 3.7.5 Using NOR Gates -- 3.8 Summary -- Problems -- Chapter 4: Combinational Logic -- 4.1 Introduction -- 4.2 Analysis of Combinational Logic -- 4.3 Design of Combinational Logic -- 4.3.1 Solution -- 4.4 Decoder -- 4.4.1 Implementing a Function Using a Decoder -- 4.5 Encoder -- 4.6 Multiplexer (MUX) -- 4.6.1 Designing Large Multiplexer Using Smaller Multiplexers -- 4.6.2 Implementing Functions Using Multiplexer -- 4.7 Half Adder, Full Adder, Binary Adder, and Subtractor -- 4.7.1 Full Adder (FA) -- 4.7.2 4-Bit Binary Adder -- 4.7.3 Subtractor -- 4.8 ALU (Arithmetic Logic Unit) -- 4.9 Seven-Segment Display -- 4.10 Summary -- Problems -- Chapter 5: Synchronous Sequential Logic -- 5.1 Introduction -- 5.2 S-R Latch -- 5.2.1 S-R Latch Operation -- 5.3 D Flip-Flop.5.4 J-K Flip-Flop -- 5.5 T Flip-Flop -- 5.6 Register -- 5.6.1 Shift Register -- 5.6.2 Barrel Shifter -- 5.7 Frequency Divider Using J-K Flip-Flop -- 5.8 Analysis of Sequential Logic -- 5.9 State Diagram -- 5.9.1 D Flip-Flop State Diagram -- 5.10 Flip-Flop Excitation Table -- 5.10.1 D Flip-Flop Excitation Table -- 5.10.2 Excitation Table Operation -- 5.10.3 J-K Flip-Flop Excitation Table -- 5.10.4 T Flip-Flop Excitation Table -- 5.11 Counter -- 5.12 Summary -- Problems -- Chapter 6: Introduction to Computer Architecture -- 6.1 Introduction -- 6.1.1 Abstract Representation of Computer Architecture -- 6.2 Components of a Microcomputer -- 6.2.1 Central Processing Unit (CPU) -- 6.2.1.1 Register Bank -- 6.2.2 CPU Buses -- 6.2.2.1 Address Bus -- 6.2.2.2 Data Bus -- 6.2.2.3 Control Bus -- 6.2.3 Memory -- 6.2.4 Serial Input/Output -- 6.2.5 Direct Memory Access (DMA) -- 6.2.6 Programmable I/O Interrupt -- 6.2.7 32-Bit Versus 64-Bit CPU -- 6.3 CPU Technology -- 6.3.1 CISC (Complex Instruction Set Computer) -- 6.3.2 RISC -- 6.4 CPU Architecture -- 6.4.1 Von Neumann Architecture -- 6.4.2 Harvard Architecture -- 6.5 Intel Microprocessor Family -- 6.5.1 Upward Compatibility -- 6.6 Multicore Processors -- 6.7 CPU Instruction Execution Steps -- 6.7.1 Pipelining -- 6.8 Disk Controller -- 6.9 Microcomputer Bus -- 6.9.1 ISA Bus -- 6.9.2 Microchannel Architecture Bus -- 6.9.3 EISA Bus -- 6.9.4 VESA Bus -- 6.9.5 PCI Bus -- 6.9.6 Universal Serial BUS (USB) -- 6.9.7 USB Architecture -- 6.9.7.1 Host Controller -- 6.9.7.2 Root Hub -- 6.9.7.3 Hub -- 6.9.7.4 USB Cable -- 6.9.7.5 USB Device -- 6.9.8 PCI Express Bus -- 6.9.8.1 PCI Express Architecture -- 6.9.8.2 PCI Express Protocol Architecture -- 6.9.8.3 Software Layer -- 6.9.8.4 PCI Express Physical Layer -- 6.10 FireWire -- 6.10.1 HDMI (High-Definition Multimedia Interface) -- 6.10.1.1 Motherboard -- 6.11 Summary.Review Questions -- Chapter 7: Memory -- 7.1 Introduction -- 7.2 Memory -- 7.2.1 RAM -- 7.2.2 DRAM Packaging -- 7.2.3 ROM (Read-Only Memory) -- 7.2.4 Memory Access Time -- 7.3 Hard Disk -- 7.3.1 Disk Characteristics -- 7.3.2 Cluster -- 7.3.3 Disk File System -- 7.4 Solid-State Drive (SSD) -- 7.5 Memory Hierarchy -- 7.5.1 Cache Memory -- 7.5.2 Cache Terminology -- 7.5.3 Cache Memory Mapping Methods -- 7.5.4 Direct Mapping -- 7.5.5 Set Associative Mapping -- 7.5.6 Replacement Method -- 7.5.7 Fully Associative Mapping -- 7.5.8 Cache Update Methods -- 7.5.9 Effective Access Time (EAT) of Memory -- 7.5.10 Virtual Memory -- 7.5.10.1 Page Table -- 7.5.11 Memory Organization of a Computer -- 7.5.11.1 Memory Operation -- Questions and Problems -- Problems -- Chapter 8: Assembly Language and ARM Instructions Part I -- 8.1 Introduction -- 8.2 Instruction Set Architecture (ISA) -- 8.2.1 Classification of Instruction Based on Number of Operands -- 8.2.1.1 No Operand Instructions -- 8.2.1.2 One-Operand Instructions -- 8.2.1.3 Two-Operand Instructions -- 8.2.1.4 Three-Operand Instructions -- 8.3 ARM Processor Architecture -- 8.3.1 Instruction Decoder and Logic Control -- 8.3.2 Address Register -- 8.3.3 Address Increment -- 8.3.4 Register Bank -- 8.3.5 Barrel Shifter -- 8.3.6 ALU -- 8.3.7 Write Data Register -- 8.3.8 Read Data Register -- 8.3.9 ARM Operation Mode -- 8.4 ARM Registers -- 8.4.1 Current Program Status Register (CPSR) -- 8.4.2 Flag Bits -- 8.4.3 Control Bits -- 8.5 ARM Instructions -- 8.5.1 Data Processing Instructions -- 8.5.1.1 Registers Operands -- 8.5.1.2 Immediate Operand -- 8.5.2 Compare and Test Instructions -- 8.5.2.1 CMP Instruction (Compare Instruction) -- 8.5.2.2 CMN Compare Negate -- 8.5.2.3 TST (Test Instruction) -- 8.5.3 Register Swap Instructions (MOV and MVN) -- 8.5.4 Shift and Rotate Instructions -- 8.5.4.1 Logical Shift Left (LSL).8.5.4.2 Logical Shift Right (LSR) -- 8.5.4.3 Arithmetic Shift Right (ASR) -- 8.5.4.4 Rotate Right -- 8.5.5 ARM Unconditional Instructions and Conditional Instructions -- 8.6 Stack Operation and Instructions -- 8.7 Branch (B) and Branch with Link Instruction (BL) -- 8.8 Multiply (MUL) and Multiply-Accumulate (MLA) Instructions -- 8.9 Summary -- Problems and Questions -- Chapter 9: ARM Assembly Language Programming Using Keil Development Tools -- 9.1 Introduction -- 9.2 Keil Development Tools for ARM Assembly -- 9.2.1 Assembling a Program -- 9.2.2 Running the Debugger/Simulator -- 9.3 Program Template -- 9.4 Programming Rules -- 9.4.1 CASE Rules -- 9.4.2 Comments -- 9.5 Data Representation and Memory -- 9.6 Directives -- 9.6.1 Data Directive -- 9.6.1.1 DCB (Define Constant Byte) -- 9.6.1.2 DCW (Define Constant Half Word) -- 9.6.1.3 DCD (Define Constant Word) -- 9.6.1.4 Character Strings -- 9.6.1.5 Single Character -- 9.6.1.6 SPACE -- 9.7 Memory in μVision v5 -- 9.8 Summary -- Questions and Problems -- Chapter 10: ARM Instructions Part II and Instruction Formats -- 10.1 Introduction -- 10.2 ARM Data Transfer Instructions -- 10.2.1 ARM Pseudo Instructions -- 10.2.2 Store Instructions (STR) -- 10.3 ARM Addressing Mode -- 10.3.1 Immediate Addressing -- 10.3.2 Pre-indexed -- 10.3.3 Pre-indexed with Write Back -- 10.3.4 Post-index Addressing -- 10.4 Swap Memory and Register (SWAP) -- 10.5 Storing Data Using Keil μVision 5 -- 10.6 Bits Field Instructions -- 10.7 ARM Instruction Formats -- 10.7.1 ARM Data Processing Instruction Format -- 10.7.1.1 Condition Code -- 10.7.1.2 I bit -- 10.7.1.3 Op Code -- 10.7.2 B and BL Instruction Format -- 10.7.3 Multiply Instruction Format -- 10.7.4 Data Transfer Instructions (LDRB, LDR, STRB, and STR) -- 10.7.5 Data Transfer Half Word and Signed Number (LDRH, STRH, LDRSB, LDRSH) -- 10.7.6 Swap Memory and Register (SWAP).10.8 Summary.Assembly languages (Electronic computers)Computer engineeringComputer architectureAssembly languages (Electronic computers)Computer engineering.Computer architecture.005.265Elahi Ata720845MiAaPQMiAaPQMiAaPQ9910553072903321Computer Systems2517636UNINA05556nam 2200673 450 991080822040332120230803212247.094-6274-176-X(CKB)3710000000316072(EBL)1913357(SSID)ssj0001442034(PQKBManifestationID)11759829(PQKBTitleCode)TC0001442034(PQKBWorkID)11418353(PQKB)10502593(MiAaPQ)EBC1913357(Au-PeEL)EBL1913357(CaPaEBR)ebr10995905(CaONFJC)MIL728765(OCoLC)900344169(EXLCZ)99371000000031607220150105h20142014 uy 0engur|n|---|||||txtccrStriving for Allah purification and resistance among fundamentalist Muslims in the Netherlands /Fiore GeelhoedHague, Netherlands :Eleven International Publishing,2014.Portland, Oregon :International Specialized Book Services,[date of distribution not identified]©20141 online resource (284 p.)Description based upon print version of record.1-322-97483-7 94-6236-493-1 Includes bibliographical references.Cover; Title page; PREFACE; CONTENTS; FIGURES; INTRODUCTION; 1 REMOVING THE VEIL; 1.1 Islamic Fundamentalism in the West: The Dutch Case and a British Impression; 1.2 Getting Started: Three Research Methods; 1.2.1 Conducting Interviews; 1.2.2 Getting in Place for Observation; 1.2.3 Exploring Online Interactions; 1.3 Ethical Issues when Entering the Field; 1.3.1 Being an 'Unveiled' Non-Muslim Researcher; 1.3.2 Anonimity and Confidentiality; 1.3.3 Assuming Informed Consent; 1.3.4 Acceptance of Closed Inner Doors; 1.4 In the Field: Countering Obstacles and Limitations to Validity1.4.1 Problems in Gaining Trust1.4.2 Internal Validity: Social Desirability and Hidden Transcripts; 1.4.3 Validity of Virtual Reality and Personalities; 1.4.4 External Validity; 1.5 Human Factors in Fieldwork; 1.5.1 Reliability: Opening up to the Insider Perspective; 1.5.2 Dealing with Expectations of Respondents; 1.6 Registration of Observations and Interviews; 1.6.1 Observations: Overt Researcher, Covert Notetaking; 1.6.2 Interviews: No Recording Please!; 1.7 Analysis of Data; 1.8 Summary; 2 ISLAMIC FUNDAMENTALISM AS A THREAT TO SOCIETY?; 2.1 Conceptualizing Islamic Fundamentalism2.2 Global Sources, Local Manifestations of Islamic Fundamentalism2.2.1 The Rise of Transnational Fundamentalism; 2.2.2 The Resonance of Islamic Fundamentalism among Dutch Muslims; 2.3 Anti-Western Beliefs and Behaviour?; 2.3.1 The Islamic Way of Life: Islam is Everywhere and Everything; 2.3.2 Contact between Believers and Unbelievers; 2.3.3 (Western Liberal) Democracy versus Sharia; 2.3.4 International Issues and Jihad; 2.4 Moderate Muslims versus Orthodox, Radical, and Extremist Fundamentalists; 2.4.1 Moderate; 2.4.2 Orthodox; 2.4.3 Radical and Extremist; 2.5 Summary3 CONVERSION, RADICALIZATION AND IDENTITY STRAIN3.1 Conceptualizing Identity and (Radical) Conversion: Continuous Processes; 3.2 Understanding Conversion to Orthodox, Radical and Extremist Islam; 3.2.1 The Desire to Convert; 3.2.2 The Temptation of Fundamentalist Interpretations; 3.2.3 Explanatory Models and Links with (Criminological) Theories; 3.3 Multiple Experiences Contributing to Identity Crisis; 3.3.1 Being Adrift; 3.3.2 Experiencing Personal Loss and Suffering; 3.3.3 Experiencing Social Exclusion and Lack of Recognition; 3.3.4 A Desire for Transcendence3.3.5 The Common Factor: Identity Crisis and a Quest for Personal Meaning3.4 Different Directions: A Role of Significant Others and 'Identity Strain'?; 3.4.1 Significant Others; 3.4.2 Gradations of Identity Crisis and (Radical) Conversion; 3.4.3 The Nature of the Crisis: Identity Strain; 3.5 Summary; 4 AN ORTHODOX FOCUS ON POSITIVE SELF-IDENTIFICATION; 4.1 Identity, Identification and Difference; 4.2 Fundamentalist Meaning Systems as a Source of Secure Identities; 4.2.2 The Security of Relying on a Higher Power; 4.3 The Security of Fundamentalist Boundaries in Everyday Life4.3.1 Rules as Protection in the Pluralist Chaos of Modern LifeIslamic fundamentalist movements, such as Salafism, are of great concern to Western societies like the Netherlands, yet much remains unknown about these phenomena. Striving for Allah fills in the blanks by presenting primary data from in-depth qualitative research in the Netherlands and, to a lesser extent, Britain. First, the book compares orthodox, radical, and extremist groups - regarding attitudes, motives, reasons, and behavior - within Islamic fundamentalism. Then it presents an innovative theoretical framework that contributes to the understanding of the attraction of Islamic fundamentaReligious fundamentalismNetherlandsFundamentalismReligious aspectsNetherlandsMuslimsNetherlandsNetherlandsfastReligious fundamentalismFundamentalismReligious aspectsMuslims200.904Geelhoed Fiore1674982MiAaPQMiAaPQMiAaPQBOOK9910808220403321Striving for Allah4040145UNINA01981cam0 22003973 450 SOB001639620250904083956.020040211d2002 |||||ita|0103 baitaIT S Incisioni del '700 in Italia nella raccolta d'arte Pagliara dell'Istituto Suor Orsola Benincasaa cura di Maria Teresa Penta, Barbara JattaNapoliIstituto Suor Orsola Benincasa2002357 p.ill.34 cmCatalogo della mostra tenuta a Napoli, 12 aprile-15 giugno 2002Penta, Maria TeresaAF00015128070Jatta, BarbaraA600200030713070*Istituto *Suor *Orsola *BenincasaAF00024653070262251*Fondazione *PagliaraA600200058575070ITUNISOB20250904RICAUNISOBUNISOB700109545UNISOB700109653UNISOB700109654UNISOBFondo|De|Sanctis|F154676UNISOBFondo|Calì184061SOB0016396M 102 Monografia moderna SBNM700003153SI109545DONOcarranoUNISOBUNISOB20110706090357.020140618133620.0bethb700003153-bSI109653DONOmenleUNISOBUNISOB20111117113223.020170607095354.0bethb700003153-cSI109654menleUNISOBUNISOB20111117113355.020140618133559.0bethbFondo|De|Sanctis|FCXVII (117)CON154676DeSanctisFdonoNmenleUNISOBUNISOB20111117113435.020250312143458.0bethbPer le modalità di consultazione vedi homepage della Biblioteca link FondiFondo|Calì001673SI18406120250306CaliDonoNrovitoUNISOBUNISOB20250904083911.020250904083956.0rovitoIncisioni del '700 in Italia nella raccolta d'arte Pagliara dell'Istituto Suor Orsola Benincasa1675056UNISOB