04174nam 22007815 450 99646604090331620200702131943.03-540-47774-810.1007/3-540-60580-0(CKB)1000000000016921(SSID)ssj0000321998(PQKBManifestationID)11243173(PQKBTitleCode)TC0000321998(PQKBWorkID)10282127(PQKB)10980044(DE-He213)978-3-540-47774-7(PPN)155197371(EXLCZ)99100000000001692120121227d1995 u| 0engurnn|008mamaatxtccrThe Complexity of Simple Computer Architectures[electronic resource] /edited by Silvia M. Müller, Wolfgang J. Paul1st ed. 1995.Berlin, Heidelberg :Springer Berlin Heidelberg :Imprint: Springer,1995.1 online resource (XII, 273 p.) Lecture Notes in Computer Science,0302-9743 ;995Bibliographic Level Mode of Issuance: Monograph3-540-60580-0 The formal architecture model -- Functional modules -- Hardwired control -- Design of a minimal CPU -- Design of the DLX machine -- Trade-off analyses -- Interrupt -- Microprogrammed control -- Further applications of the architecture model.This book presents a formal model for evaluating the cost effectiveness of computer architectures. The model can cope with a wide range of architectures, from CPU design to parallel supercomputers. To illustrate the formal procedure of trade-off analyses, several non-pipelined design alternatives for the well-known RISC architecture called DLX are analyzed quantitatively. It is formally proved that the interrupt mechanism proposed for the DLX architecture handles nested interrupts correctly. In an appendix all programs to compute the cost and cycle time of the designs described are listed in C code. Running these simple C programs on a PC is sufficient to verify the results presented. The book addresses design professionals and students in computer architecture.Lecture Notes in Computer Science,0302-9743 ;995Microprogramming MicroprocessorsComputer system failuresArithmetic and logic units, ComputerElectronicsMicroelectronicsLogic designControl Structures and Microprogramminghttps://scigraph.springernature.com/ontologies/product-market-codes/I12018Processor Architectureshttps://scigraph.springernature.com/ontologies/product-market-codes/I13014System Performance and Evaluationhttps://scigraph.springernature.com/ontologies/product-market-codes/I13049Arithmetic and Logic Structureshttps://scigraph.springernature.com/ontologies/product-market-codes/I12026Electronics and Microelectronics, Instrumentationhttps://scigraph.springernature.com/ontologies/product-market-codes/T24027Logic Designhttps://scigraph.springernature.com/ontologies/product-market-codes/I12050Microprogramming .Microprocessors.Computer system failures.Arithmetic and logic units, Computer.Electronics.Microelectronics.Logic design.Control Structures and Microprogramming.Processor Architectures.System Performance and Evaluation.Arithmetic and Logic Structures.Electronics and Microelectronics, Instrumentation.Logic Design.004.2/2Müller Silvia M746201Müller Silvia Medthttp://id.loc.gov/vocabulary/relators/edtPaul Wolfgang Jedthttp://id.loc.gov/vocabulary/relators/edtBOOK996466040903316Complexity of simple computer architectures1489183UNISA00972nam a22002651i 450099100016129970753620230215120838.0040802s1970 uika||||||||||||||||eng b13184441-39ule_instARCHE-113705ExLBibl. Interfacoltà T. PellegrinoitaA.t.i. Arché s.c.r.l. Pandora Sicilia s.r.l.794.122Wade, Robert Graham123244The closed Ruy Lopez /R. G. Wade, L. S. Blackstock, P. J. BoothLondon :Batsford,c1970256 p. :ill. ;23 cmScacchiBlackstock, L. S.Booth, Philip J..b1318444102-04-1405-08-04991000161299707536LE002 Fondo Giudici S 1012002000396471le002C. 1-E0.00-no00000.i1382576805-08-04Closed Ruy Lopez1101821UNISALENTOle00205-08-04ma-enguik41