01414nam 2200325 450 99655996470331620231205191952.0979-88-557-0206-4(CKB)28534579300041(NjHacI)9928534579300041(EXLCZ)992853457930004120231205d2023 uy 0engur|||||||||||txtrdacontentcrdamediacrrdacarrier61523-1-2023 - IEEE/IEC International Standard--Delay and power calculation standardsPart 1 Integrated Circuit (IC) Open Library Architecture (OLA) /IEEENew York, USA :IEEE,2023.1 online resource (646 pages)Ways for integrated circuit designers to analyze chip timing and power consistently across a broad set of electrical design automation (EDA) applications are covered in this standard. Methods by which integrated circuit vendors can express timing and power information once per given technology are also covered. In addition, the means by which EDA vendors can meet their application performance and capacity needs are discussed.Integrated circuit layoutIntegrated circuit layout.621.3NjHacINjHaclBOOK99655996470331661523-1-2023 - IEEE3590376UNISA