05861nam 22007455 450 99646586090331620230406032333.010.1007/11560548(CKB)1000000000213281(SSID)ssj0000317038(PQKBManifestationID)11240581(PQKBTitleCode)TC0000317038(PQKBWorkID)10295905(PQKB)10067688(DE-He213)978-3-540-32030-2(MiAaPQ)EBC3067864(PPN)123097800(EXLCZ)99100000000021328120100319d2005 u| 0engurnn|008mamaatxtccrCorrect Hardware Design and Verification Methods[electronic resource] 13th IFIP WG 10.5Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings /edited by Dominique Borrione, Wolfgang Paul1st ed. 2005.Berlin, Heidelberg :Springer Berlin Heidelberg :Imprint: Springer,2005.1 online resource (XII, 414 p.) Theoretical Computer Science and General Issues,2512-2029 ;3725Bibliographic Level Mode of Issuance: Monograph3-540-32030-X 3-540-29105-9 Includes bibliographical references and index.Invited Talks -- Is Formal Verification Bound to Remain a Junior Partner of Simulation? -- Verification Challenges in Configurable Processor Design with ASIP Meister -- Tutorial -- Towards the Pervasive Verification of Automotive Systems -- Functional Approaches to Design Description -- Wired: Wire-Aware Circuit Design -- Formalization of the DE2 Language -- Game Solving Approaches -- Finding and Fixing Faults -- Verifying Quantitative Properties Using Bound Functions -- Abstraction -- How Thorough Is Thorough Enough? -- Interleaved Invariant Checking with Dynamic Abstraction -- Automatic Formal Verification of Liveness for Pipelined Processors with Multicycle Functional Units -- Algorithms and Techniques for Speeding (DD-Based) Verification 1 -- Efficient Symbolic Simulation via Dynamic Scheduling, Don’t Caring, and Case Splitting -- Achieving Speedups in Distributed Symbolic Reachability Analysis Through Asynchronous Computation -- Saturation-Based Symbolic Reachability Analysis Using Conjunctive and Disjunctive Partitioning -- Real Time and LTL Model Checking -- Real-Time Model Checking Is Really Simple -- Temporal Modalities for Concisely Capturing Timing Diagrams -- Regular Vacuity -- Algorithms and Techniques for Speeding Verification 2 -- Automatic Generation of Hints for Symbolic Traversal -- Maximal Input Reduction of Sequential Netlists via Synergistic Reparameterization and Localization Strategies -- A New SAT-Based Algorithm for Symbolic Trajectory Evaluation -- Evaluation of SAT-Based Tools -- An Analysis of SAT-Based Model Checking Techniques in an Industrial Environment -- Model Reduction -- Exploiting Constraints in Transformation-Based Verification -- Identification and Counter Abstraction for Full Virtual Symmetry -- Verification of Memory Hierarchy Mechanisms -- On the Verification of Memory Management Mechanisms -- Counterexample Guided Invariant Discovery for Parameterized Cache Coherence Verification -- Short Papers -- Symbolic Partial Order Reduction for Rule Based Transition Systems -- Verifying Timing Behavior by Abstract Interpretation of Executable Code -- Behavior-RTL Equivalence Checking Based on Data Transfer Analysis with Virtual Controllers and Datapaths -- Deadlock Prevention in the Æthereal Protocol -- Acceleration of SAT-Based Iterative Property Checking -- Error Detection Using BMC in a Parallel Environment -- Formal Verification of Synchronizers -- A Parameterized Benchmark Suite of Hard Pipelined-Machine-Verification Problems -- Improvements to the Implementation of Interpolant-Based Model Checking -- High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design -- Proving Parameterized Systems: The Use of Pseudo-Pipelines in Polyhedral Logic -- Resolving Quartz Overloading -- FPGA Based Accelerator for 3-SAT Conflict Analysis in SAT Solvers -- Predictive Reachability Using a Sample-Based Approach -- Minimizing Counterexample of ACTL Property -- Data Refinement for Synchronous System Specification and Construction -- Introducing Abstractions via Rewriting -- A Case Study: Formal Verification of Processor Critical Properties.Theoretical Computer Science and General Issues,2512-2029 ;3725Computer scienceComputersSoftware engineeringMachine theoryArtificial intelligenceTheory of ComputationComputer HardwareComputer Science Logic and Foundations of ProgrammingSoftware EngineeringFormal Languages and Automata TheoryArtificial IntelligenceComputer science.Computers.Software engineering.Machine theory.Artificial intelligence.Theory of Computation.Computer Hardware.Computer Science Logic and Foundations of Programming.Software Engineering.Formal Languages and Automata Theory.Artificial Intelligence.621.39/5Borrione Dominiqueedthttp://id.loc.gov/vocabulary/relators/edtPaul Wolfgangedthttp://id.loc.gov/vocabulary/relators/edtIFIP WG 10.5.BOOK996465860903316Correct Hardware Design and Verification Methods772373UNISA03238nam 2200601Ia 450 991078009750332120230331015630.01-134-94979-0988-98015-4-X1-280-32213-697866103221380-203-40741-5(CKB)111056485510924(EBL)170362(OCoLC)437078826(SSID)ssj0000250295(PQKBManifestationID)11211332(PQKBTitleCode)TC0000250295(PQKBWorkID)10231608(PQKB)10422812(MiAaPQ)EBC170362(Au-PeEL)EBL170362(CaPaEBR)ebr10061055(CaONFJC)MIL32213(EXLCZ)9911105648551092419900207d1990 uy 0engur|n|---|||||txtccrSri Lanka[electronic resource] history and the roots of conflict /edited by Jonathan SpencerLondon [England] ;New York Routledge19901 online resource (260 p.)Description based upon print version of record.1-138-98284-9 0-415-04461-8 Includes bibliographical references and index.Cover; Sri Lanka; Title Page; Copyright Page; Table of Contents; Contributors; Acknowledgements; Abbreviations; 1. Introduction: the power of the past; Part I: Colonialism, history and racism; 2. The generation of communal identities; 3. The people of the lion: the Sinhala identity and ideology in history and historiography; 4. Historical images in the British period; 5. The politics of the Tamil past; Part II: History at a moment of crisis; 6. Nationalist rhetoric and local practice: the fate of the village community in Kukulewa7. A compound of many histories: the many pasts of an east coast Tamil community8. Rural awakenings: grassroots development and the cultivation of a national past in rural Sri Lanka; Part III: The politics of the past; 9. J.R.Jayewardene: righteousness and realpolitik; 10. Newspaper nationalism: Sinhala identity as historical discourse; 11. Afterword: scared places, violent spaces; IndexIn the past decade, Sri Lanka has been engulfed by political tragedy as successive governments have failed to settle the grievances of the Tamil minority in a way acceptable to the majority Sinhala population. The new Premadasa presidency faces huge economic and political problems with large sections of the island under the control of the Indian Peace-Keeping Force (IPKF) and militant separatist Tamil groups operating in the north and south.This book is not a conventional political history of Sri Lanka. Instead, it attempts to shed fresh light on the historical roots of the ethnic crisis aSri LankaHistorySri LankaEthnic relationsSri LankaPolitics and government305.8/0095493Spencer Jonathan1954-141867MiAaPQMiAaPQMiAaPQBOOK9910780097503321Sri Lanka3776953UNINA