04152nam 22007095 450 99646562160331620230329174917.03-642-36812-310.1007/978-3-642-36812-7(CKB)3280000000007557(DE-He213)978-3-642-36812-7(SSID)ssj0000880061(PQKBManifestationID)11495320(PQKBTitleCode)TC0000880061(PQKBWorkID)10872477(PQKB)11290626(MiAaPQ)EBC3093049(PPN)169139662(EXLCZ)99328000000000755720130321d2013 u| 0engurnn|008mamaatxtrdacontentcrdamediacrrdacarrierReconfigurable Computing: Architectures, Tools and Applications[electronic resource] 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013, Proceedings /edited by Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro Diniz1st ed. 2013.Berlin, Heidelberg :Springer Berlin Heidelberg :Imprint: Springer,2013.1 online resource (XVI, 238 p. 104 illus.) Theoretical Computer Science and General Issues,2512-2029 ;7806International conference proceedings.3-642-36811-5 Includes bibliographical references and author index.Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications -- Hardware Acceleration of Genetic Sequence Alignment -- An FPGA Acceleration for the Kd-tree Search in Photon Mapping -- SEU Resilience of DES, AES in SRAM-based FPGA -- An Architecture for IPv6 Lookup Using Parallel Index Generation Units -- Hardware Index to Set Partition Converter -- Teaching SoC Using Video Games to Improve Student Engagement -- Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-based Custom Computing -- Hardware Acceleration of Matrix Multiplication Over Small Prime Finite Fields -- Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms -- Architecture for Transparent Binary Acceleration of Loops with Memory Accesses -- Parametric Optimization of Reconfigurable Designs using Machine Learning -- Fast Template-based Heterogeneous MPSoC Synthesis on FPGA -- Hierarchical and Multiple Switching NoC with Floorplan based Adaptability -- Performance Analysis And Optimization of High Density Tree-Based 3D Multilevel FPGA.This book constitutes the thoroughly refereed conference proceedings of the 9th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2013, held in Los Angeles, CA, USA, in March 2013. The 28 revised papers presented, consisting of 20 full papers and 11 poster papers were carefully selected from 41 submissions. The topics covered are applications, arithmetic, design optimization for FPGAs, architectures, place and routing.Theoretical Computer Science and General Issues,2512-2029 ;7806ComputersComputer engineeringComputer networksAlgorithmsComputer HardwareComputer Engineering and NetworksAlgorithmsComputers.Computer engineering.Computer networks.Algorithms.Computer Hardware.Computer Engineering and Networks.Algorithms.006.3Brisk Philipedthttp://id.loc.gov/vocabulary/relators/edtde Figueiredo Coutinho José Gabrieledthttp://id.loc.gov/vocabulary/relators/edtDiniz Pedroedthttp://id.loc.gov/vocabulary/relators/edtARC 2013MiAaPQMiAaPQMiAaPQBOOK996465621603316Reconfigurable Computing: Architectures, Tools and Applications772428UNISA