01766nam 2200397 450 99628005410331620231209090817.01-5044-5367-010.1109/IEEESTD.2018.8575225(CKB)4100000007213109(NjHacI)994100000007213109(EXLCZ)99410000000721310920231209d2018 uy 0engur|||||||||||txtrdacontentcrdamediacrrdacarrierISO/IEC/IEEE 8802-3:2017/Amd.8:2018(E) ISO/IEC/IEEE International Standard - Information technologyPart 3, Standard for EthernetAMENDMENT 8, Physical layer and management parameters for Power over Data Lines (PoDL) of single balanced twisted-pair Ethernet Telecommunications and information exchange between systems : Local and metropolitan area networks : Specific requirements /LAN/MAN Standards Committee of the IEEE Computer SocietyNew York :IEEE,2018.1 online resource (80 pages)ISO/IEC/IEEE ;8802-3Specifications and management parameters for the provision of power via a single twisted pair to connected Data Terminal Equipment (DTE) with IEEE 802.3 single balanced twisted-pair interfaces are added by this amendment to IEEE Std 802.3-2015.8802-3ISO/IEC/IEEE 8802-3Ethernet (Local area network system)Electric cablesData processingEthernet (Local area network system)Electric cablesData processing.004.68NjHacINjHaclDOCUMENT996280054103316ISO1086301UNISA02032nam 2200325 450 99657486700331620231211115044.01-5044-6271-8(CKB)5280000000208112(NjHacI)995280000000208112(EXLCZ)99528000000020811220231211d2019 uy 0engur|||||||||||txtrdacontentcrdamediacrrdacarrier1647-2019 - IEEE Standard for the Functional Verification Language e - Redline /Institute of Electrical and Electronics EngineersNew York, New York :IEEE,2019.1 online resource (981 pages)The e functional verification language is an application-specific programming language, aimed at automating the task of verifying a hardware or software design with respect to its specification. Verification environments written in e provide a model of the environment in which the design is expected to function, including the kinds of erroneous conditions the design needs to withstand. A typical verification environment is capable of generating user-controlled test inputs with statistically interesting characteristics. Such an environment can check the validity of the design responses. Functional coverage metrics are used to control the verification effort and gauge the quality of the design. e verification environments can be used throughout the design cycle, from a high-level architectural model to a fully realized system. A definition of the e language syntax and semantics and how tool developers and verification engineers should use them are contained in this standard.Application softwareDevelopmentApplication softwareDevelopment.005.114NjHacINjHaclDOCUMENT9965748670033161647-2019 - IEEE Standard for the Functional Verification Language e - Redline2583981UNISA