00864nam0-2200325---450-99000966461040332120130114090149.0978-88-498-2679-1000966461FED01000966461(Aleph)000966461FED0100096646120130114d2011----km-y0itay50------baitaITy-------001yyKarl PopperDario AntiseriSoveria MannelliRubbettino2011338 p.23 cmUniversale Rubbettino8Popper, Karl R.19322itaAntiseri,Dario<1940- >53664ITUNINAREICATUNIMARCBK990009664610403321Collez. 2328 (8)48619FSPBCFSPBCKarl Popper838689UNINA00929nmm 2200301Ka 450 991069502930332120060511163244.0(CKB)5470000002366429(OCoLC)68692587(EXLCZ)99547000000236642920060511d1969 ua engurcn|---|||||zzzrdacontentcrdamediacrrdacarrierDebrief--Apollo 8[electronic resource][Washington, D.C.] :National Archives and Records Administration,[1969]1 file digital, Flash, sound, colorTitle from title screen (viewed on May 11, 2006).MoonExplorationUnited States.National Archives and Records Administration.GPOGPOBOOK9910695029303321Debrief--Apollo 83121769UNINA05909nam 2200805Ia 450 991101976720332120200520144314.0978661026478097812802647881280264780978047032128704703212889780471464174047146417197804712215620471221562(CKB)111087027126486(EBL)215165(SSID)ssj0000080454(PQKBManifestationID)11107463(PQKBTitleCode)TC0000080454(PQKBWorkID)10095856(PQKB)10709055(MiAaPQ)EBC215165(OCoLC)85820930(CaSebORM)9780471417774(OCoLC)840429218(OCoLC)ocn840429218 (Perlego)2763493(EXLCZ)9911108702712648620010619d2001 uy 0engur|n|---|||||txtccrLow-voltage SOI CMOS VLSI devices and circuits /James B. Kuo, Shih-Chia Lin1st editionNew York Wileyc20011 online resource (424 p.)"A Wiley-Interscience publication."9780471417774 0471417777 Includes bibliographical references and index.Contents; Preface; Acknowledgments; 1 Introduction; 1.1 Evolution of CMOS VLSI; 1.2 SOI versus Bulk; 1.3 Low-Voltage SOI VLSI; 1.4 Objectives; References; 2 SOI CMOS Devices-Part I; 2.1 Basic SOI Technology; 2.1.1 SOI Wafers; 2.1.2 Shallow Trench Isolation; 2.1.3 SOI Device Structure; 2.2 Back Gate Bias Effects; 2.2.1 PD versus FD; 2.2.2 Inversion versus Accumulation; 2.3 Short Channel Effects; 2.3.1 Biasing Dependence; 2.3.2 Structure Dependence; 2.3.3 Processing Dependence; 2.3.4 Subthreshold; 2.4 Narrow Channel Effects; 2.4.1 Structure Dependence; 2.4.2 Subthreshold2.4.3 Back Gate Bias Dependence2.4.4 Isolation Dependence; 2.5 Mobility; 2.5.1 Vertical Field Dependence; 2.5.2 Lateral Field Dependence; 2.6 Floating Body Effects; 2.6.1 Strong Inversion Kink Effects; 2.6.2 Body Contact; 2.6.3 Various Techniques to Reduce Kink Effects; 2.7 Subthreshold Behavior; 2.7.1 FD versus PD; 2.7.2 PD; 2.7.3 DIBL Dependence; 2.7.4 Latch/GIDL Behavior; 2.8 Impact lonization; 2.8.1 Basic Analysis; 2.8.2 Body Current; 2.8.3 Monitoring Techniques; 2.9 Breakdown; 2.9.1 Structure Dependence; 2.9.2 Bipolar Induced Effects; 2.9.3 LDD; 2.10 Transient-Induced Leakage2.11 History Effects2.12 Self-Heating; 2.12.1 Drain Current; 2.12.2 Thermal Resistance; 2.12.3 Thermal Coupling; 2.12.4 AC Behavior; 2.13 Transient Behaviors; 2.13.1 Floating-Body Induced; 2.13.2 History Effect; 2.14 Summary; References; Problems; 3 SOI CMOS Devices-Part II; 3.1 Hot Carriers; 3.1.1 NMOS; 3.1.2 PMOS; 3.1.3 Substrate Current; 3.1.4 Back Gate Bias; 3.1.5 Device Structure Dependence; 3.1.6 Stress Time; 3.1.7 Isolation Structure; 3.1.8 SOI Wafers; 3.1.9 Lifetime; 3.2 Accumulation-Mode Devices; 3.2.1 DC Behavior; 3.2.2 AC Behavior; 3.2.3 Thin-Film Thickness3.2.4 Accumulation versus Inversion3.3 Double Gate; 3.4 DTMOS; 3.4.1 Basic Performance; 3.4.2 Second-Order Effects; 3.5 Scaling Trends; 3.6 Single Electron Transistors (SET); 3.7 Electrostatic Discharge (ESD); 3.8 Temperature Dependence; 3.8.1 Noise; 3.9 Sensitivity; 3.10 Radiation Effects; 3.11 Summary; References; Problems; 4 Fundamentals of SOI CMOS Circuits; 4.1 Basic Circuit Issues; 4.1.1 Layout; 4.1.2 High Speed and Low Power; 4.1.3 Floating Body; 4.1.4 Self-Heating; 4.2 Floating Body Effects; 4.2.1 Static Logic Circuits; 4.2.2 Pass Gate Transistors; 4.2.3 Switch Network Logic (SNL)4.2.4 Hysteresis4.2.5 Analog Circuits; 4.3 Low-Voltage Circuit Techniques; 4.3.1 Low-Voltage Technology; 4.3.2 Dynamic Body Control; 4.3.3 Sense Amp; 4.4 DTMOS Circuits; 4.4.1 DTMOS Device; 4.4.2 DTMOS Inverter; 4.4.3 DTMOS Buffer; 4.4.4 Advanced DTMOS Devices; 4.4.5 Active Body Control; 4.5 MTCMOS Circuits; 4.6 Noise; 4.7 Self-Heating; 4.8 ESD Circuits; 4.9 System-on-a Chip (SOC) Technology; 4.10 Summary; References; Problems; 5 SOI CMOS Digital Circuits; 5.1 Static Logic Circuits; 5.1.1 SOI CPL; 5.1.2 DTPT; 5.1.3 SOI CVSL; 5.1.4 SOI Adiabatic CVSL; 5.2 Dynamic Logic Circuits5.2.1 SOI DTMOS Dynamic Logic CircuitA practical, comprehensive survey of SOI CMOS devices and circuits for microelectronics engineersThe microelectronics industry is becoming increasingly dependent on SOI CMOS VLSI devices and circuits. This book is the first to address this important topic with a practical focus on devices and circuits. It provides an up-to-date survey of the current knowledge regarding SOI device behaviors and describes state-of-the-art low-voltage CMOS VLSI analog and digital circuit techniques.Low-Voltage SOI CMOS VLSI Devices and Circuits covers the entire field, from basic concepts to the most advaLow-voltage silicon-on-insulator complementary metal-oxide-semiconductor very-large-scale integration devices and circuitsLow voltage integrated circuitsIntegrated circuitsVery large scale integrationMetal oxide semiconductors, ComplementaryLow voltage integrated circuits.Integrated circuitsVery large scale integration.Metal oxide semiconductors, Complementary.621.39621.39/5621.395Kuo James B.1956-770617Lin Shih-Chia1842324MiAaPQMiAaPQMiAaPQBOOK9911019767203321Low-voltage SOI CMOS VLSI devices and circuits4422373UNINA