01834oam 2200421zu 450 991087264860332120241212215035.0(CKB)111026746746500(SSID)ssj0000507024(PQKBManifestationID)12165571(PQKBTitleCode)TC0000507024(PQKBWorkID)10545833(PQKB)10108092(NjHacI)99111026746746500(EXLCZ)9911102674674650020160829d1998 uy engur|||||||||||txtccrMultiple-Valued Logic: ISMVL '98[Place of publication not identified]I E E E Imprint19981 online resourceBibliographic Level Mode of Issuance: Monograph9780818683718 0818683716 Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138) -- Table of contents -- Advanced circuit technology to realize post giga-bit DRAM -- Development of InGaAs-based multiple-junction surface tunnel transistors for multiple-valued logic circuits -- Ultrafast ternary quantizer using resonant tunneling devices -- A Josephson ternary memory circuit -- A note on realizing multiple-valued logic functions using Akers' cells-cell sizes and path lengths -- Minimization of exclusive sums of multi-valued complex terms for logic cell arrays -- Minimal test set generation for fault diagnosis in R-valued PLAs.Many-valued logicCongressesSwitching theoryCongressesMany-valued logicSwitching theory511.3PQKBPROCEEDING9910872648603321Multiple-Valued Logic: ISMVL '982326846UNINA