02446oam 2200589zu 450 991083107760332120210731015514.01-280-55652-897866105565260-471-45755-80-470-35692-80-471-45756-6(CKB)1000000000019044(SSID)ssj0000312670(PQKBManifestationID)11229677(PQKBTitleCode)TC0000312670(PQKBWorkID)10332405(PQKB)11500319(MiAaPQ)EBC4957239(Au-PeEL)EBL4957239(CaONFJC)MIL55652(OCoLC)65214206(CaSebORM)9780471429760(EXLCZ)99100000000001904420160829d2003 uy engurunu|||||txtccrVerilog Coding for Logic Synthesis1st edition[Place of publication not identified]Wiley Interscience Imprint20031 online resource (1 v.) illBibliographic Level Mode of Issuance: Monograph0-471-42976-7 Includes bibliographical references and index.Introduction -- Asic design flow -- Verilog coding -- Coding style : best-known method for synthesis -- Design example of programmable timer -- Design example of programmable logic block for peripheral interface.Provides a practical approach to Verilog design and problem solving. Bulk of the book deals with practical design problems that design engineers solve on a daily basis. Includes over 90 design examples. There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification. Book is suitable for use as a textbook in EE departments that have VLSI coursesDigital electronicsLogic circuitsComputer-aided designVerilog (Computer hardware description language)Digital electronics.Logic circuitsComputer-aided design.Verilog (Computer hardware description language)621.395Lee Weng Fook867193PQKBBOOK9910831077603321Verilog Coding for Logic Synthesis3931124UNINA