05715nam 2200733 450 991082266220332120230714022702.03-527-67012-23-527-67010-63-527-67013-0(CKB)2550000001280491(EBL)1680609(SSID)ssj0001216004(PQKBManifestationID)11811818(PQKBTitleCode)TC0001216004(PQKBWorkID)11189932(PQKB)11712529(OCoLC)878919955(MiAaPQ)EBC1680609(Au-PeEL)EBL1680609(CaPaEBR)ebr10865387(CaONFJC)MIL601769(EXLCZ)99255000000128049120140506h20142014 uy 0engur|n|---|||||txtrdacontentcrdamediacrrdacarrierHandbook of 3D integrationVolume 33D process technology /edited by Philip Garrou, Mitsumasa Koyanagi, and Peter Ramm ; Richard A. Allen [and sixty others], contributorsWeinheim, Germany :Wiley-VCH,2014.©20141 online resource (475 p.)Description based upon print version of record.3-527-33466-1 1-306-70518-5 Includes bibliographical references at the end of each chapters and index.Handbook of 3D Integration: 3D Process Technology; Contents; List of Contributors; 1 3D IC Integration Since 2008; 1.1 3D IC Nomenclature; 1.2 Process Standardization; 1.3 The Introduction of Interposers (2.5D); 1.4 The Foundries; 1.4.1 TSMC; 1.4.2 UMC; 1.4.3 GlobalFoundries; 1.5 Memory; 1.5.1 Samsung; 1.5.2 Micron; 1.5.3 Hynix; 1.6 The Assembly and Test Houses; 1.7 3D IC Application Roadmaps; References; 2 Key Applications and Market Trends for 3D Integration and Interposer Technologies; 2.1 Introduction; 2.2 Advanced Packaging Importance in the Semiconductor Industry is Growing2.3 3D Integration-Focused Activities - The Global IP Landscape2.4 Applications, Technology, and Market Trends; References; 3 Economic Drivers and Impediments for 2.5D/3D Integration; 3.1 3D Performance Advantages; 3.2 The Economics of Scaling; 3.3 The Cost of Future Scaling; 3.4 Cost Remains the Impediment to 2.5D and 3D Product Introduction; 3.4.1 Required Economics for Interposer Use in Mobile Products; 3.4.2 Silicon Interposer Pricing; References; 4 Interposer Technology; 4.1 Definition of 2.5D Interposers; 4.2 Interposer Drivers and Need; 4.3 Comparison of Interposer Materials4.4 Silicon Interposers with TSV4.5 Lower Cost Interposers; 4.5.1 Glass Interposers; 4.5.1.1 Challenges in Glass Interposers; 4.5.1.2 Small-Pitch Through-Package Via Hole Formation and Ultrathin Glass Handling; 4.5.1.3 Metallization of Glass TPV; 4.5.1.4 Reliability of Copper TPVs in Glass Interposers; 4.5.1.5 Thermal Dissipation of Glass; 4.5.1.6 Glass Interposer Fabrication with TPV and RDL; 4.5.2 Low-CTE Organic Interposers; 4.5.3 Polycrystalline Silicon Interposer; 4.5.3.1 Polycrystalline Silicon Interposer Fabrication Process; 4.6 Interposer Technical and Manufacturing Challenges4.7 Interposer Application Examples4.8 Conclusions; References; 5 TSV Formation Overview; 5.1 Introduction; 5.2 TSV Process Approaches; 5.2.1 TSV-Middle Approach; 5.2.2 Backside TSV-Last Approach; 5.2.3 Front-Side TSV-Last Approach; 5.3 TSV Fabrication Steps; 5.3.1 TSV Etching; 5.3.2 TSV Insulation; 5.3.3 TSV Metallization; 5.3.4 Overburden Removal by CMP; 5.3.5 TSV Anneal; 5.3.6 Temporary Carrier Wafer Bonding and Debonding; 5.3.7 Wafer Thinning and TSV Reveal; 5.4 Yield and Reliability; References; 6 TSV Unit Processes and Integration; 6.1 Introduction; 6.2 TSV Process Overview6.3 TSV Unit Processes6.3.1 Etching; 6.3.2 Insulator Deposition with CVD; 6.3.3 Metal Liner/Barrier Deposition with PVD; 6.3.4 Via Filling by ECD of Copper; 6.3.5 CMP of Copper; 6.3.6 Temporary Bonding between Carrier and Device Wafer; 6.3.7 Wafer Backside Thinning; 6.3.8 Backside RDL; 6.3.9 Metrology, Inspection, and Defect Review; 6.4 Integration and Co-optimization of Unit Processes in Via Formation Sequence; 6.5 Co-optimization of Unit Processes in Backside Processing and Via-Reveal Flow; 6.6 Integration and Co-optimization of Unit Processes in Via-Last Flow6.7 Integration with PackagingEdited by key figures in 3D integration and written by top authors from high-tech companies and renowned research institutions, this book covers the intricate details of 3D process technology.As such, the main focus is on silicon via formation, bonding and debonding, thinning, via reveal and backside processing, both from a technological and a materials science perspective. The last part of the book is concerned with assessing and enhancing the reliability of the 3D integrated devices, which is a prerequisite for the large-scale implementation of this emerging technology. Invaluable reIntegrated circuitsIntegrated circuitsDesign and constructionSiliconThree-dimensional imagingIntegrated circuits.Integrated circuitsDesign and construction.Silicon.Three-dimensional imaging.621.3815Garrou PhilipKoyanagi MitsumasaRamm PeterAllen RickyMiAaPQMiAaPQMiAaPQBOOK9910822662203321Handbook of 3D integration4013656UNINA