16598nam 2200925Ia 450 991081494770332120200520144314.09781118559079111855907X97811184433231118443322978111844326211184432689781118443279111844327697812835990301283599031(CKB)3580000000000671(StDuBDS)AH24220125(SSID)ssj0000737293(PQKBManifestationID)11469214(PQKBTitleCode)TC0000737293(PQKBWorkID)10782478(PQKB)10687755(OCoLC)809555689(MiAaPQ)EBC1021727(WaSeSS)Ind00046462(Au-PeEL)EBL1021727(CaPaEBR)ebr10602092(CaONFJC)MIL391148(OCoLC)815973422(OCoLC)794035451(FINmELB)ELB178080(Perlego)1002357(EXLCZ)99358000000000067120120621d2012 uy 0engurcn|||||||||txtccrESD basics from semiconductor manufacturing to use /Steven H. Voldman1st ed.Chichester, West Sussex Wiley20121 online resource (xviii, 208 p. )illESD seriesBibliographic Level Mode of Issuance: Monograph9780470979716 0470979712 Includes bibliographical references and index.ESD BASICS: From Semiconductor Manufacturing to Product Use -- Contents -- About the Author -- Preface -- Acknowledgments -- 1 Fundamentals of Electrostatics -- 1.1 Introduction -- 1.2 Electrostatics -- 1.2.1 Thales of Miletus and Electrostatic Attraction -- 1.2.2 Electrostatics and the Triboelectric Series -- 1.2.3 Triboelectric Series and Gilbert -- 1.2.4 Triboelectric Series and Gray -- 1.2.5 Triboelectric Series and Dufay -- 1.2.6 Triboelectric Series and Franklin -- 1.2.7 Electrostatics - Symmer and the Human Body Model -- 1.2.8 Electrostatics - Coulomb and Cavendish -- 1.2.9 Electrostatics - Faraday and the Ice Pail Experiment -- 1.2.10 Electrostatics - Faraday and Maxwell -- 1.2.11 Electrostatics - Paschen -- 1.2.12 Electrostatics - Stoney and the "Electron" -- 1.3 Triboelectric Charging - How does it Happen? -- 1.4 Conductors, Semiconductors, and Insulators -- 1.5 Static Dissipative Materials -- 1.6 ESD and Materials -- 1.7 Electrification and Coulomb's Law -- 1.7.1 Electrification by Friction -- 1.7.2 Electrification by Induction -- 1.7.3 Electrification by Conduction -- 1.8 Electromagnetism and Electrodynamics -- 1.9 Electrical Breakdown -- 1.9.1 Electrostatic Discharge and Breakdown -- 1.9.2 Breakdown and Paschen's Law -- 1.9.3 Breakdown and Townsend -- 1.9.4 Breakdown and Toepler's Law -- 1.9.5 Avalanche Breakdown -- 1.10 Electroquasistatics and Magnetoquasistatics -- 1.11 Electrodynamics and Maxwell's Equations -- 1.12 Electrostatic Discharge (ESD) -- 1.13 Electromagnetic Compatibility (EMC) -- 1.14 Electromagnetic Interference (EMI) -- 1.15 Summary and Closing Comments -- References -- 2 Fundamentals of Manufacturing and Electrostatics -- 2.1 Materials, Tooling, Human Factors, and Electrostatic Discharge -- 2.1.1 Materials and Human Induced Electric Fields -- 2.2 Manufacturing Environment and Tooling.2.3 Manufacturing Equipment and ESD Manufacturing Problems -- 2.4 Manufacturing Materials -- 2.5 Measurement and Test Equipment -- 2.5.1 Manufacturing Testing for Compliance -- 2.6 Grounding and Bonding Systems -- 2.7 Worksurfaces -- 2.8 Wrist Straps -- 2.9 Constant Monitors -- 2.10 Footwear -- 2.11 Floors -- 2.12 Personnel Grounding with Garments -- 2.12.1 Garments -- 2.13 Air Ionization -- 2.14 Seating -- 2.15 Carts -- 2.16 Packaging and Shipping -- 2.16.1 Shipping Tubes -- 2.16.2 Trays -- 2.17 ESD Identification -- 2.18 ESD Program Management - Twelve Steps to Building an ESD Strategy -- 2.19 ESD Program Auditing -- 2.20 ESD On-Chip Protection -- 2.21 Summary and Closing Comments -- References -- 3 ESD, EOS, EMI, EMC and Latchup -- 3.1 ESD, EOS, EMI, EMC and Latchup -- 3.1.1 ESD -- 3.1.2 EOS -- 3.1.3 EMI -- 3.1.4 EMC -- 3.1.5 Latchup -- 3.2 ESD Models -- 3.2.1 Human Body Model (HBM) -- 3.2.2 Machine Model (MM) -- 3.2.3 Cassette Model -- 3.2.4 Charged Device Model (CDM) -- 3.2.5 Transmission Line Pulse (TLP) -- 3.2.6 Very Fast Transmission Line Pulse (VF-TLP) -- 3.3 Electrical Overstress (EOS) -- 3.3.1 EOS Sources - Lightning -- 3.3.2 EOS Sources - Electromagnetic Pulse (EMP) -- 3.3.3 EOS Sources - Machinery -- 3.3.4 EOS Sources - Power Distribution -- 3.3.5 EOS Sources - Switches, Relays and Coils -- 3.3.6 EOS Design Flow and Product Definition -- 3.3.7 EOS Sources - Design Issues -- 3.3.8 EOS Failure Mechanisms -- 3.4 EMI -- 3.5 EMC -- 3.6 Latchup -- 3.7 Summary and Closing Comments -- References -- 4 System Level ESD -- 4.1 System Level Testing -- 4.1.1 System Level Testing Objectives -- 4.1.2 Distinction of System and Component Level Testing Failure Criteria -- 4.2 When Systems and Chips Interact -- 4.3 ESD and System Level Failures -- 4.3.1 ESD Current and System Level Failures -- 4.3.2 ESD Induced E- and H-Fields and System Level Failures.4.4 Electronic Systems -- 4.4.1 Cards and Boards -- 4.4.2 System Chassis and Shielding -- 4.5 System Level Problems Today -- 4.5.1 Hand Held Systems -- 4.5.2 Cell Phones -- 4.5.3 Servers and Cables -- 4.5.4 Laptops and Cables -- 4.5.5 Disk Drives -- 4.5.6 Digital Cameras -- 4.6 Automobiles, ESD, EOS, and EMI -- 4.6.1 Automobiles and ESD - Ignition Systems -- 4.6.2 Automobiles and EMI - Electronic Pedal Assemblies -- 4.6.3 Automobiles and Gas Tank Fires -- 4.6.4 Hybrids and Electric Cars -- 4.6.5 Automobiles in the Future -- 4.7 Aerospace Applications -- 4.7.1 Airplanes, Partial Discharge, and Lightning -- 4.7.2 Satellites, Spacecraft Charging, and Single Event Upset (SEU) -- 4.7.3 Space Landing Missions -- 4.8 ESD and System Level Test Models -- 4.9 IEC 61000-4-2 -- 4.10 Human Metal Model (HMM) -- 4.11 Charged Board Model (CBM) -- 4.12 Cable Discharge Event (CDE) -- 4.12.1 Cable Discharge Event (CDE) and Scaling -- 4.12.2 Cable Discharge Event (CDE) - Cable Measurement Equipment -- 4.12.3 Cable Configuration - Test Configuration -- 4.12.4 Cable Configuration - Floating Cable -- 4.12.5 Cable Configuration - Held Cable -- 4.12.6 Cable Discharge Event (CDE) - Peak Current vs. Charged Voltage -- 4.12.7 Cable Discharge Event (CDE) - Plateau Current vs Charged Voltage -- 4.13 Summary and Closing Comments -- References -- 5 Component Level Issues - Problems and Solutions -- 5.1 ESD Chip Protection - The Problem and the Cure -- 5.2 ESD Chip Level Design Solutions - Basics of Design Synthesis -- 5.2.1 ESD Circuits -- 5.2.2 ESD Signal Pin Protection Networks -- 5.2.3 ESD Power Clamp Protection Networks -- 5.2.4 ESD Power Domain-to-Domain Circuitry -- 5.2.5 ESD Internal Signal Line Domain-to-Domain Protection Circuitry -- 5.3 ESD Chip Floor Planning - Basics of Design Layout and Synthesis -- 5.3.1 Placement of ESD Signal Pin HBM Circuitry.5.3.2 Placement of ESD Signal Pin CDM Circuitry -- 5.3.3 Placement of ESD Power Clamp Circuitry -- 5.3.4 Placement of ESD VSS-to-VSS Circuitry -- 5.4 ESD Analog Circuit Design -- 5.4.1 Symmetry and Common Centroid Design for ESD Analog Circuits -- 5.4.2 Analog Signal Pin to Power Rail ESD Network -- 5.4.3 Common Centroid Analog Signal Pin to Power Rail ESD Network -- 5.4.4 Co-synthesis of Common Centroid Analog Circuit and ESD Networks -- 5.4.5 Signal Pin-to-Signal Pin Differential Pair ESD Network -- 5.4.6 Common Centroid Signal Pin Differential Pair ESD Protection -- 5.5 ESD Radio Frequency (RF) Design -- 5.5.1 ESD Radio Frequency (RF) Design Practices -- 5.5.2 ESD RF Circuits - Signal Pin ESD Networks -- 5.5.3 ESD RF Circuits - ESD Power Clamps -- 5.5.4 ESD RF Circuits - ESD RF VSS-to-VSS Networks -- 5.6 Summary and Closing Comments -- References -- 6 ESD in Systems - Problems and Solutions -- 6.1 ESD System Solutions from Largest to Smallest -- 6.2 Aerospace Solutions -- 6.3 Oil Tanker Solutions -- 6.4 Automobile Solutions -- 6.5 Computers - Servers -- 6.5.1 Servers - Touch Pads and Handling Procedures -- 6.6 Mother Boards and Cards -- 6.6.1 System Card Insertion Contacts -- 6.6.2 System Level Board Design - Ground Design -- 6.7 System Level "On Board" ESD Protection -- 6.7.1 Spark Gaps -- 6.7.2 Field Emission Devices (FED) -- 6.8 System Level Transient Solutions -- 6.8.1 Transient Voltage Suppression (TVS) Devices -- 6.8.2 Polymer Voltage Suppression (PVS) Devices -- 6.9 Package-Level Mechanical ESD Solutions - Mechanical "Crowbars" -- 6.10 Disk Drive ESD Solutions -- 6.10.1 In Line "ESD Shunt" -- 6.10.2 Armature - Mechanical "Shunt" - A Built-In Electrical "Crowbar" -- 6.11 Semiconductor Chip Level Solutions - Floor Planning, Layout, and Architecture -- 6.11.1 Mixed Signal Analog and Digital Floor Planning.6.11.2 Bipolar-CMOS-DMOS (BCD) Floor Planning -- 6.11.3 System-on Chip Design Floor Planning -- 6.12 Semiconductor Chip Solutions - Electrical Power Grid Design -- 6.12.1 HMM and IEC Specification Power Grid and Interconnect Design Considerations -- 6.12.2 ESD Power Clamp Design Synthesis - IEC 61000-4-2 Responsive ESD Power Clamps -- 6.13 ESD and EMC - When Chips Bring Down Systems -- 6.14 System Level and Component Level ESD Testing and System Level Response -- 6.14.1 Time Domain Reflection (TDR) and Impedance Methodology for ESD Testing -- 6.14.2 Time Domain Reflectometry (TDR) ESD Test System Evaluation -- 6.14.3 ESD Degradation System Level Method - Eye Tests -- 6.15 EMC and ESD Scanning -- 6.16 Summary and Closing Comments -- References -- 7 Electrostatic Discharge (ESD) in the Future -- 7.1 What is in the Future for ESD? -- 7.2 Factories and Manufacturing -- 7.3 Photo-Masks and Reticles -- 7.3.1 ESD Concerns in Photo-Masks -- 7.3.2 Avalanche Breakdown in Photo-Masks -- 7.3.3 Electrical Model in Photo-Masks -- 7.3.4 Failure Defects in Photo-Masks -- 7.4 Magnetic Recording Technology -- 7.5 Micro-Electromechanical (MEM) Devices -- 7.5.1 ESD Concerns in Micro-Electromechanical (MEM) Devices -- 7.6 Micro-Motors -- 7.6.1 ESD Concerns in Micro-Motors -- 7.7 Micro-Electromechanical (MEM) RF Switches -- 7.7.1 ESD Concerns in Micro-Electromechanical (MEM) RF Switches -- 7.8 Micro-Electromechanical (MEM) Mirrors -- 7.8.1 ESD Concerns in Micro-Electromechanical (MEM) Mirrors -- 7.9 Transistors -- 7.9.1 Transistors - Bulk vs. SOI Technology -- 7.9.2 Transistors and FinFETs -- 7.9.3 ESD in FinFETs -- 7.10 Silicon Nanowires -- 7.11 Carbon Nanotubes -- 7.12 Future Systems and System Designs -- 7.13 Summary and Closing Comments -- References -- Glossary -- ESD Standards -- Index.This title introduces the fundamentals of ESD, electrical overstress (EOS), electromagnetic interference (EMI), electromagnetic compatibility (EMC), and latchup, as well as provides a coherent overview of the semiconductor manufacturing environment and the final system assembly.Electrostatic discharge (ESD) continues to impact semiconductor manufacturing, semiconductor components and systems, as technologies scale from micro- to nano electronics. This book introduces the fundamentals of ESD, electrical overstress (EOS), electromagnetic interference (EMI), electromagnetic compatibility (EMC), and latchup, as well as provides a coherent overview of the semiconductor manufacturing environment and the final system assembly. It provides an illuminating look into the integration of ESD protection networks followed by examples in specific technologies, circuits, and chips. The text is unique in covering semiconductor chip manufacturing issues, ESD semiconductor chip design, and system problems confronted today as well as the future of ESD phenomena and nano-technology. Look inside for extensive coverage on: The fundamentals of electrostatics, triboelectric charging, and how they relate to present day manufacturing environments of micro-electronics to nano-technology Semiconductor manufacturing handling and auditing processing to avoid ESD failures ESD, EOS, EMI, EMC, and latchup semiconductor component and system level testing to demonstrate product resilience from human body model (HBM), transmission line pulse (TLP), charged device model (CDM), human metal model (HMM), cable discharge events (CDE), to system level IEC 61000-4-2 tests ESD on-chip design and process manufacturing practices and solutions to improve ESD semiconductor chip solutions, also practical off-chip ESD protection and system level solutions to provide more robust systems System level concerns in servers, laptops, disk drives, cell phones, digital cameras, hand held devices, automobiles, and space applications Examples of ESD design for state-of-the-art technologies, including CMOS, BiCMOS, SOI, bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, smart power, magnetic recording technology, micro-machines (MEMs) to nano-structures ESD Basics: From Semiconductor Manufacturing to Product Use complements the author's series of books on ESD protection. For those new to the field, it is an essential reference and a useful insight into the issues that confront modern technology as we enter the Nano-electronic Era. Electrostatic discharge (ESD) continues to impact semiconductor manufacturing, semiconductor components and systems, as technologies scale from micro- to nano electronics. This book introduces the fundamentals of ESD, electrical overstress (EOS), electromagnetic interference (EMI), electromagnetic compatibility (EMC), and latchup, as well as provides a coherent overview of the semiconductor manufacturing environment and the final system assembly. It provides an illuminating look into the integration of ESD protection networks followed by examples in specific technologies, circuits, and chips. The text is unique in covering semiconductor chip manufacturing issues, ESD semiconductor chip design, and system problems confronted today as well as the future of ESD phenomena and nano-technology. Look inside for extensive coverage on: The fundamentals of electrostatics, triboelectric charging, and how they relate to present day manufacturing environments of micro-electronics to nano-technology Semiconductor manufacturing handling and auditing processing to avoid ESD failures ESD, EOS, EMI, EMC, and latchup semiconductor component and system level testing to demonstrate product resilience from human body model (HBM), transmission line pulse (TLP), charged device model (CDM), human metal model (HMM), cable discharge events (CDE), to system level IEC 61000-4-2 tests ESD on-chip design and process manufacturing practices and solutions to improve ESD semiconductor chip solutions, also practical off-chip ESD protection and system level solutions to provide more robust systems System level concerns in servers, laptops, disk drives, cell phones, digital cameras, hand held devices, automobiles, and space applications Examples of ESD design for state-of-the-art technologies, including CMOS, BiCMOS, SOI, bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, smart power, magnetic recording technology, micro-machines (MEMs) to nano-structures ESD Basics: From Semiconductor Manufacturing to Product Use complements the author's series of books on ESD protection. For those new to the field, it is an essential reference and a useful insight into the issues that confront modern technology as we enter the Nano-electronic Era.ESD series.Electronic apparatus and appliancesDesign and constructionElectric dischargesElectronic apparatus and appliancesProtectionMicroelectronicsStatic eliminatorsElectrostaticsElectronic apparatus and appliancesDesign and construction.Electric discharges.Electronic apparatus and appliancesProtection.Microelectronics.Static eliminators.Electrostatics.621.3815TEC008010bisacshVoldman Steven H872423MiAaPQMiAaPQMiAaPQBOOK9910814947703321ESD basics4093601UNINA