05724nam 22007575 450 99646559490331620200705005237.03-540-49567-310.1007/BFb0031795(CKB)1000000000234555(SSID)ssj0000323226(PQKBManifestationID)11937900(PQKBTitleCode)TC0000323226(PQKBWorkID)10296780(PQKB)10311063(DE-He213)978-3-540-49567-3(PPN)155188062(EXLCZ)99100000000023455520121227d1996 u| 0engurnn|008mamaatxtccrFormal Methods in Computer-Aided Design[electronic resource] First International Conference, FMCAD '96, Palo Alto, CA, USA, November 6 - 8, 1996, Proceedings /edited by Mandayam Srivas, Albert Camilleri1st ed. 1996.Berlin, Heidelberg :Springer Berlin Heidelberg :Imprint: Springer,1996.1 online resource (X, 478 p.) Lecture Notes in Computer Science,0302-9743 ;1166Bibliographic Level Mode of Issuance: Monograph3-540-61937-2 The need for formal methods for integrated circuit design -- Verification of all circuits in a floating-point unit using word-level model checking -- *BMDs can delay the use of theorem proving for verifying arithmetic assembly instructions -- Modular verification of multipliers -- Verification of IEEE compliant subtractive division algorithms -- Hierarchical verification of two-dimensional high-speed multiplication in PVS: A case study -- Experiments in automating hardware verification using inductive proof planning -- Verifying nondeterministic implementations of deterministic systems -- A methodology for processor implementation verification -- Coverage-directed test generation using symbolic techniques -- Self-consistency checking -- Inverting the abstraction mapping: A methodology for hardware verification -- Validity checking for combinations of theories with equality -- A unified approach for combining different formalisms for hardware verification -- Verification using uninterpreted functions and finite instantiations -- Formal verification of the Island Tunnel Controller using Multiway Decision Graphs -- VIS -- PVS: Combining specification, proof checking, and model checking -- HOL Light: A tutorial introduction -- A tutorial on digital design derivation using DRS -- ACL2 theorems about commercial microprocessors -- Formal synthesis in circuit design — A classification and survey -- Formal specification and verification of VHDL -- Specification of control flow properties for verification of synthesized VHDL designs -- An algebraic model of correctness for superscalar microprocessors -- Mechanically checking a lemma used in an automatic verification tool -- Automatic generation of invariants in processor verification -- A brief study of BDD package performance -- Local encoding transformations for optimizing OBDD-representations of finite state machines -- Decomposition techniques for efficient ROBDD construction -- BDDs vs. Zero-Suppressed BDDs: for CTL symbolic model checking of Petri nets -- HDL-based integration of formal methods and CAD tools in the PREVAIL environment.This book constitutes the refereed proceedings of the First International Conference on Formal Methods in Computer-Aided Design, FMCAD '96, held in Palo Alto, California, USA, in November 1996. The 25 revised full papers presented were selected from a total of 65 submissions; also included are three invited survey papers and four tutorial contributions. The volume covers all relevant formal aspects of work in computer-aided systems design, including verification, synthesis, and testing.Lecture Notes in Computer Science,0302-9743 ;1166Computer-aided engineeringComputersComputer engineeringComputer hardwareComputer logicMathematical logicComputer-Aided Engineering (CAD, CAE) and Designhttps://scigraph.springernature.com/ontologies/product-market-codes/I23044Theory of Computationhttps://scigraph.springernature.com/ontologies/product-market-codes/I16005Computer Engineeringhttps://scigraph.springernature.com/ontologies/product-market-codes/I27000Computer Hardwarehttps://scigraph.springernature.com/ontologies/product-market-codes/I1200XLogics and Meanings of Programshttps://scigraph.springernature.com/ontologies/product-market-codes/I1603XMathematical Logic and Formal Languageshttps://scigraph.springernature.com/ontologies/product-market-codes/I16048Computer-aided engineering.Computers.Computer engineering.Computer hardware.Computer logic.Mathematical logic.Computer-Aided Engineering (CAD, CAE) and Design.Theory of Computation.Computer Engineering.Computer Hardware.Logics and Meanings of Programs.Mathematical Logic and Formal Languages.621.39/2Srivas Mandayamedthttp://id.loc.gov/vocabulary/relators/edtCamilleri Albertedthttp://id.loc.gov/vocabulary/relators/edtFMCAD '96BOOK996465594903316Formal Methods in Computer-Aided Design1891319UNISA01167nam 2200289z- 450 991068942110332120161209100912.0(CKB)5860000000020300(BIP)007967337(EXLCZ)99586000000002030020220406c2001uuuu -u- -engCurrent issues before the Financial Accounting Standards Board hearing before the Subcommittee on Commerce, Trade, and Consumer Protection of the Committee on Energy and Commerce, House of Representatives, One Hundred Seventh Congress, first session, July 31, 20011 online resource (iii, 48 p.) 0-16-066212-5 Current issues before the Financial Accounting Standards Board SecuritiesAccountingStandardsUnited StatesAccountingStandardsUnited StatesSecuritiesAccountingBusiness & economicsSecuritiesAccountingStandardsAccountingStandardsBOOK9910689421103321Current issues before the Financial Accounting Standards Board3146694UNINA