03457nam 2200481 450 991052300340332120220415055747.03-030-79774-010.1007/978-3-030-79774-4(CKB)4100000011994778(DE-He213)978-3-030-79774-4(MiAaPQ)EBC6689098(Au-PeEL)EBL6689098(PPN)257357165(EXLCZ)99410000001199477820220415d2022 uy 0engurnn|008mamaatxtrdacontentcrdamediacrrdacarrierBlocks, towards energy-efficient, coarse-grained reconfigurable architectures /Mark Wijtvliet, Henk Corporaal, Akash Kumar1st ed. 2022.Cham, Switzerland :Springer,[2022]©20221 online resource (X, 220 p. 158 illus., 117 illus. in color.) 3-030-79773-2 Includes bibliographical references and index.Introduction -- CGRA background -- Concept of the Blocks architecture -- The Blocks framework -- Energy, area, and performance evaluation -- Architectural model -- Case study: the BrainSense platform -- Conclusion.This book describes a new, coarse-grained reconfigurable architecture (CGRA), called Blocks, and puts it in the context of computer architectures, and in particular of other CGRAs. The book starts with an extensive evaluation of historic and existing CGRAs and their strengths and weaknesses. This also leads to a better understanding and new definition of what distinguishes CGRAs from other architectural approaches. The authors introduce Blocks as unique due to its separate programmable control and data paths, allowing light-weight instruction decode units to be arbitrarily connected to one or more functional units (FUs) over a statically configured interconnect. The discussion includes an explanation of how to model architectures, resulting in an area and energy model for Blocks. The accuracy of this model is evaluated against fully implemented architectures, showing that although it is three orders of magnitude faster than synthesis the error margin is very acceptable. The book concludes with a case study on a real System-on-Chip, including a RISC architecture, the Blocks CGRA and peripherals. Provides a comprehensive overview of many coarse-grained reconfigurable architectures (CGRAs) proposed in the last 25 years, as well as a classification of those CGRAs; Offers a new view on the positioning of CGRAs; Provides an in-depth description of structure of the Blocks CGRA and its unique aspects; Includes an extensive evaluation of various performance aspects of Blocks, such as performance, energy and area, as well as a comparison with various traditional approaches; Uses a case study showing how Blocks can be used in a real system on-chip, and how performance of this system-on-chip can be estimated using the proposed model.Adaptive computing systemsAdaptive computing systems.004Wijtvliet Mark1078620Corporaal HenkKumar AkashMiAaPQMiAaPQMiAaPQBOOK9910523003403321Blocks, Towards Energy-efficient, Coarse-grained Reconfigurable Architectures2590822UNINA