05878nam 2200757 450 991045662800332120200520144314.01-59693-425-5(CKB)2550000000002726(EBL)946534(OCoLC)796382975(SSID)ssj0000397890(PQKBManifestationID)11292847(PQKBTitleCode)TC0000397890(PQKBWorkID)10362518(PQKB)11255740(MiAaPQ)EBC946534(Au-PeEL)EBL946534(CaPaEBR)ebr10359035(CaBNVSL)mat09100288(IEEE)9100288(EXLCZ)99255000000000272620200729d2009 uy engur|n|---|||||txtccrMetamodeling-driven IP reuse for SoC integration and microprocessor design /Deepak A. Mathaikutty, Sandeep K. ShuklaBoston :Artech House,©2009.[Piscataqay, New Jersey] :IEEE Xplore,[2009]1 online resource (310 p.)Description based upon print version of record.1-59693-424-7 Includes bibliographical references and index.Metamodeling-Driven IP Reuse for SoC Integration and Microprocessor Design; Contents; Preface; References; Acknowledgments; Chapter 1 Introduction; Design IP; Verification IP; Design Reuse; Verification Reuse; 1.1 ONGOING EFFORTS IN DESIGN IP REUSE; 1.2 ONGOING EFFORTS IN VERIFICATION IP REUSE; 1.3 ESSENTIAL ISSUES WITH IP REUSE; Essential Issues with Design IP Reuse; (1) IP Provider; IP Library; Documentation; Quality Assurance; Standardization; (2) IP Integrator; Exploration; Integration; Methodology and Environment; (3) Tool Developer for IP Reuse; Support for IP ProviderSupport for IP IntegratorEssential Issues with Verification IP Reuse; (1) Modeling Language; (2) Generation Algorithms; 1.4 METAMODELING APPROACH TO REUSE; 1.5 PROBLEM STATEMENT; 1.6 RESEARCH CONTRIBUTIONS; 1.7 TOOLS AND TECHNIQUES DEVELOPED; References; Chapter 2 Background; 2.1 METAMODELING; 2.1.1 Implicit Metamodeling Versus Explicit Metamodeling; 2.1.2 Generic Modeling Environment; 2.2 COMPONENT COMPOSITION FRAMEWORK; 2.3 REFLECTION AND INTROSPECTION (R-I); 2.4 SYSTEMC; 2.5 MODEL-DRIVEN VALIDATION; 2.5.1 Microprocessor Validation Flow; 2.5.2 Simulation-Based Functional Validation2.6 TEST GENERATION2.6.1 Constraint Programming; 2.6.2 Esterel Studio; 2.7 COVERAGE-DIRECTED TEST GENERATION; 2.7.1 Structural Coverage; 2.7.2 Functional Coverage; 2.7.3 Property Specification Language (PSL); 2.7.4 Fault Classification; References; Chapter 3 Related Work; 3.1 COMPONENT COMPOSITION FRAMEWORK; 3.1.1 The BALBOA Framework; 3.1.2 Liberty Simulation Environment (LSE); 3.1.3 EWD; 3.1.4 Ptolemy II; 3.1.5 Metropolis; 3.2 COMPONENT-BASED SOFTWARE DESIGN ENVIRONMENTS; 3.3 IP INTERFACING STANDARDS; 3.3.1 SPIRIT; 3.4 EXISTING TOOLS FOR STRUCTURAL REFLECTION3.5 ARCHITECTURE DESCRIPTION LANGUAGES3.6 TEST GENERATION; References; Part I Design Reuse; Chapter 4 A Metamodel for Component Composition; 4.1 CC LANGUAGE, METAMODEL, AND MODEL; 4.1.1 Component Composition Language (CCL); 4.1.2 Component Composition Metamodel (CCMM); 4.1.3 Component Composition Model (CCM); 4.2 CC ANALYSIS AND TRANSLATION; 4.2.1 Consistency Checking; 4.2.2 Type Inference; 4.2.3 XML Translation; 4.3 CASE STUDIES; 4.3.1 AMBA AHB RTL Bus Model; 4.3.2 Simple Bus TL Model; 4.4 DESIGN EXPERIENCE AND SUMMARY; References; Chapter 5 IP Reflection and Selection5.1 METADATA FOR IP COMPOSITION5.2 METADATA ON A SYSTEMC IP SPECIFICATION; 5.3 TOOLS AND METHODOLOGY; 5.3.1 Stage 1: SystemC Parsing; 5.3.2 Stage 2: AST Parsing and DOM Population; 5.3.3 Stage 3: Processing and Constraining DOM; 5.4 IP SELECTION; 5.4.1 Illustrative Example; 5.5 CASE STUDY; 5.6 SUMMARY; References; Chapter 6 Typing Problems in IP Composition; 6.1 MCF TYPE DEFINITIONS; 6.1.1 Component Composition Language; 6.1.2 IP Library; 6.2 TYPE RESOLUTION IN MCF; 6.2.1 Type Inference on Architectural Template; 6.2.2 Type Substitution Using IP Library; 6.3 COMPARATIVE STUDY; 6.4 CASE STUDY6.5 SUMMARYThis cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a "write once, use many times" verification strategy - another effective approach that can attain a faster product design cycle.Publisher abstract.Computer softwareReusabilityComputer softwareVerificationIntellectual propertyMicroprocessorsDesign and constructionSystem designSystems on a chipDesign and constructionElectronic books.Computer softwareReusability.Computer softwareVerification.Intellectual property.MicroprocessorsDesign and construction.System design.Systems on a chipDesign and construction.621.39621.3916Mathaikutty Deepak A.964241Shukla Sandeep K964242CaBNVSLCaBNVSLCaBNVSLBOOK9910456628003321Metamodeling-driven IP reuse for SoC integration and microprocessor design2187038UNINA