02848nam 22005415 450 991037389860332120200704061950.0981-15-1314-710.1007/978-981-15-1314-5(CKB)4940000000158732(DE-He213)978-981-15-1314-5(MiAaPQ)EBC6005121(PPN)242843549(EXLCZ)99494000000015873220200102d2020 u| 0engurnn#008mamaatxtrdacontentcrdamediacrrdacarrierLogic Synthesis and SOC Prototyping RTL Design using VHDL /by Vaibbhav Taraate1st ed. 2020.Singapore :Springer Singapore :Imprint: Springer,2020.1 online resource (XIX, 251 p.)981-15-1313-9 Introduction -- ASIC Design and SOC prototype -- Design using VHDL & Guidelines -- Design using VHDL & Guidelines -- Design and Verification Strategies -- VHDL Design and RTL Tweaks -- ASIC Synthesis and Design Constraints -- Design optimization -- Design optimization -- FPGA for SOC Prototype -- Prototype using Single and Multiple FPGA. .This book describes RTL design, synthesis, and timing closure strategies for SOC blocks. It covers high-level RTL design scenarios and challenges for SOC design. The book gives practical information on the issues in SOC and ASIC prototyping using modern high-density FPGAs. The book covers SOC performance improvement techniques, testing, and system-level verification. The book also describes the modern Xilinx FPGA architecture and their use in SOC prototyping. The book covers the Synopsys DC, PT commands, and use of them to constraint and to optimize SOC design. The contents of this book will be of use to students, professionals, and hobbyists alike.Electronic circuitsMicroprogrammingLogic designCircuits and Systemshttps://scigraph.springernature.com/ontologies/product-market-codes/T24068Control Structures and Microprogramminghttps://scigraph.springernature.com/ontologies/product-market-codes/I12018Logic Designhttps://scigraph.springernature.com/ontologies/product-market-codes/I12050Electronic circuits.Microprogramming.Logic design.Circuits and Systems.Control Structures and Microprogramming.Logic Design.621.3815Taraate Vaibbhavauthttp://id.loc.gov/vocabulary/relators/aut788080MiAaPQMiAaPQMiAaPQBOOK9910373898603321Logic Synthesis and SOC Prototyping2083266UNINA