03165nam 22005055 450 991033762090332120250527121130.0981-10-8776-810.1007/978-981-10-8776-9(CKB)4100000007223462(MiAaPQ)EBC5620499(DE-He213)978-981-10-8776-9(PPN)232961913(EXLCZ)99410000000722346220181215d2019 u| 0engurcnu||||||||txtrdacontentcrdamediacrrdacarrierAdvanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog /by Vaibbhav Taraate1st ed. 2019.Singapore :Springer Singapore :Imprint: Springer,2019.1 online resource (xxi, 307 pages)981-10-8775-X Introduction -- SOC Design -- RTL Design Guidelines -- RTL Design and Verification -- Processor cores and Architecture design -- Buses and protocols in SOC designs -- DSP Algorithms and Video Processing -- ASIC and FPGA Synthesis -- Static Timing Analysis -- SOC Prototyping -- SOC Prototyping guidelines -- Design Integration and SOC synthesis -- Interconnect delays and Timing -- SOC Prototyping and debug techniques -- Testing at the board level.This book describes RTL design using Verilog, synthesis and timing closure for System On Chip (SOC) design blocks. It covers the complex RTL design scenarios and challenges for SOC designs and provides practical information on performance improvements in SOC, as well as Application Specific Integrated Circuit (ASIC) designs. Prototyping using modern high density Field Programmable Gate Arrays (FPGAs) is discussed in this book with the practical examples and case studies. The book discusses SOC design, performance improvement techniques, testing and system level verification, while also describing the modern Intel FPGA/XILINX FPGA architectures and their use in SOC prototyping. Further, the book covers the Synopsys Design Compiler (DC) and Prime Time (PT) commands, and how they can be used to optimize complex ASIC/SOC designs. The contents of this book will be useful to students and professionals alike.Electronic circuitsMicroprogrammingLogic designCircuits and Systemshttps://scigraph.springernature.com/ontologies/product-market-codes/T24068Control Structures and Microprogramminghttps://scigraph.springernature.com/ontologies/product-market-codes/I12018Logic Designhttps://scigraph.springernature.com/ontologies/product-market-codes/I12050Electronic circuits.Microprogramming.Logic design.Circuits and Systems.Control Structures and Microprogramming.Logic Design.621.3815Taraate Vaibbhavauthttp://id.loc.gov/vocabulary/relators/aut788080BOOK9910337620903321Advanced HDL Synthesis and SOC Prototyping2294597UNINA