03917nam 22006255 450 991029985330332120200705003233.03-319-09309-610.1007/978-3-319-09309-3(CKB)3710000000249016(EBL)1965453(OCoLC)892484660(SSID)ssj0001353949(PQKBManifestationID)11773467(PQKBTitleCode)TC0001353949(PQKBWorkID)11317543(PQKB)11094452(DE-He213)978-3-319-09309-3(MiAaPQ)EBC1965453(PPN)181348276(EXLCZ)99371000000024901620140925d2015 u| 0engur|n|---|||||txtccrDebug Automation from Pre-Silicon to Post-Silicon /by Mehdi Dehbashi, Görschwin Fey1st ed. 2015.Cham :Springer International Publishing :Imprint: Springer,2015.1 online resource (180 p.)Description based upon print version of record.3-319-09308-8 Includes bibliographical references and index.Introduction -- Preliminaries -- Part I Debug of Design Bugs -- Automated Debugging for Logic Bugs -- Automated Debugging from Pre-Silicon to Post-Silicon -- Automated Debugging for Synchronization Bugs -- Part II Debug of Delay Faults -- Analyzing Timing Variations -- Automated Debugging for Timing Variations -- Efficient Automated Speedpath Debugging -- Part III Debug of Transactions -- Online Debug for NoC-Based Multiprocessor SoCs -- Summary and Outlook.This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve high diagnosis accuracy and reduce the debugging time, shortening the IC development cycle and increasing the productivity of designers. Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages; Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level; Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.Electronic circuitsMicroprocessorsCircuits and Systemshttps://scigraph.springernature.com/ontologies/product-market-codes/T24068Processor Architectureshttps://scigraph.springernature.com/ontologies/product-market-codes/I13014Electronic Circuits and Deviceshttps://scigraph.springernature.com/ontologies/product-market-codes/P31010Electronic circuits.Microprocessors.Circuits and Systems.Processor Architectures.Electronic Circuits and Devices.004.1620621.3815Dehbashi Mehdiauthttp://id.loc.gov/vocabulary/relators/aut1062542Fey Görschwinauthttp://id.loc.gov/vocabulary/relators/autBOOK9910299853303321Debug Automation from Pre-Silicon to Post-Silicon2526422UNINA