03109nam 22005655 450 991029958010332120200629212759.03-319-72814-810.1007/978-3-319-72814-8(CKB)4100000001794709(DE-He213)978-3-319-72814-8(MiAaPQ)EBC5240719(PPN)223958298(EXLCZ)99410000000179470920180122d2018 u| 0engurnn|008mamaatxtrdacontentcrdamediacrrdacarrierAutomated Validation & Verification of UML/OCL Models Using Satisfiability Solvers /by Nils Przigoda, Robert Wille, Judith Przigoda, Rolf Drechsler1st ed. 2018.Cham :Springer International Publishing :Imprint: Springer,2018.1 online resource (XII, 255 p. 16 illus., 5 illus. in color.) 3-319-72813-X Includes bibliographical references.This book provides a comprehensive discussion of UML/OCL methods and design flow, for automatic validation and verification of hardware and software systems. While the presented flow focuses on using satisfiability solvers, the authors also describe how these methods can be used for any other automatic reasoning engine.  Additionally, the design flow described is applied to a broad variety of validation and verification tasks.  The authors also cover briefly how non-functional properties such as timing constraints can be handled with the described flow. Provides a general flow and description for the validation and verification of UML/OCL models; Demonstrates a detailed realization of the general flow using satisfiability solvers; Includes a case study that presents the possibilities of the state-of-the-art approaches.Electronic circuitsMicroprocessorsElectronicsMicroelectronicsCircuits and Systemshttps://scigraph.springernature.com/ontologies/product-market-codes/T24068Processor Architectureshttps://scigraph.springernature.com/ontologies/product-market-codes/I13014Electronics and Microelectronics, Instrumentationhttps://scigraph.springernature.com/ontologies/product-market-codes/T24027Electronic circuits.Microprocessors.Electronics.Microelectronics.Circuits and Systems.Processor Architectures.Electronics and Microelectronics, Instrumentation.621.3815Przigoda Nilsauthttp://id.loc.gov/vocabulary/relators/aut1064418Wille Robertauthttp://id.loc.gov/vocabulary/relators/autPrzigoda Judithauthttp://id.loc.gov/vocabulary/relators/autDrechsler Rolfauthttp://id.loc.gov/vocabulary/relators/autBOOK9910299580103321Automated Validation & Verification of UML2537895UNINA