03037nam 22005655 450 991029957120332120200630233759.0981-10-1073-010.1007/978-981-10-1073-6(CKB)3710000001411805(DE-He213)978-981-10-1073-6(MiAaPQ)EBC4884375(PPN)20298902X(EXLCZ)99371000000141180520170623d2018 u| 0engurnn|008mamaatxtrdacontentcrdamediacrrdacarrierHigh-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip /by Zheng Wang, Anupam Chattopadhyay1st ed. 2018.Singapore :Springer Singapore :Imprint: Springer,2018.1 online resource (XX, 197 p. 104 illus., 72 illus. in color.) Computer Architecture and Design Methodologies,2367-3478981-10-1072-2 Includes bibliographical references.Introduction -- Background -- Related Work -- High-level Fault Injection and Simulation -- Architectural Reliability Estimation -- Architectural Reliability Exploration -- System-level Reliability Exploration -- Conclusion and Outlook.This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures. .Computer Architecture and Design Methodologies,2367-3478Electronic circuitsComputer software—ReusabilityCircuits and Systemshttps://scigraph.springernature.com/ontologies/product-market-codes/T24068Performance and Reliabilityhttps://scigraph.springernature.com/ontologies/product-market-codes/I12077Electronic Circuits and Deviceshttps://scigraph.springernature.com/ontologies/product-market-codes/P31010Electronic circuits.Computer software—Reusability.Circuits and Systems.Performance and Reliability.Electronic Circuits and Devices.621.3815Wang Zhengauthttp://id.loc.gov/vocabulary/relators/aut514725Chattopadhyay Anupamauthttp://id.loc.gov/vocabulary/relators/autMiAaPQMiAaPQMiAaPQBOOK9910299571203321High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip2520221UNINA