03659nam 22006375 450 991025499040332120230810213659.03-658-12680-910.1007/978-3-658-12680-3(CKB)3710000000616340(EBL)4453024(OCoLC)945095099(SSID)ssj0001653373(PQKBManifestationID)16433261(PQKBTitleCode)TC0001653373(PQKBWorkID)14982690(PQKB)10840623(DE-He213)978-3-658-12680-3(MiAaPQ)EBC4453024(PPN)192770918(EXLCZ)99371000000061634020160316d2016 u| 0engur|n|---|||||txtccrComplete Symbolic Simulation of SystemC Models Efficient Formal Verification of Finite Non-Terminating Programs /by Vladimir Herdt1st ed. 2016.Wiesbaden :Springer Fachmedien Wiesbaden :Imprint: Springer Vieweg,2016.1 online resource (172 p.)BestMasters,2625-3615Description based upon print version of record.3-658-12679-5 Includes bibliographical references.Verification of Systems -- Introduction to Formal Verification of SystemC Models -- Symbolic Model Checking with Partial Order Reduction -- Efficient Symbolic State Matching using State Subsumption -- Heuristic Approaches for Symbolic State Matching -- Evaluation of Proposed Techniques.In his master thesis, Vladimir Herdt presents a novel approach, called complete symbolic simulation, for a more efficient verification of much larger (non-terminating) SystemC programs. The approach combines symbolic simulation with stateful model checking and allows to verify safety properties in (cyclic) finite state spaces, by exhaustive exploration of all possible inputs and process schedulings. The state explosion problem is alleviated by integrating two complementary reduction techniques. Compared to existing approaches, the complete symbolic simulation works more efficiently, and therefore can provide correctness proofs for larger systems, which is one of the most challenging tasks, due to the ever increasing complexity. Contents Verification of Systems Introduction to Formal Verification of SystemC Models Symbolic Model Checking with Partial Order Reduction Efficient Symbolic State Matching using State Subsumption Heuristic Approaches for Symbolic State Matching Evaluation of Proposed Techniques Target Groups Lecturers and Students of Computer Sciences and Electrical Engineering Hardware Designers and Verification Engineers using SystemC The Author Vladimir Herdt is working as Research Assistant in the Group of Computer Architecture at the University of Bremen, where he is pursuing his PhD degree. .BestMasters,2625-3615ComputersSoftware engineeringComputer scienceMathematicsComputer HardwareSoftware EngineeringMathematics of ComputingComputers.Software engineering.Computer scienceMathematics.Computer Hardware.Software Engineering.Mathematics of Computing.004Herdt Vladimirauthttp://id.loc.gov/vocabulary/relators/aut871290BOOK9910254990403321Complete Symbolic Simulation of SystemC Models1944987UNINA