01026nam--2200361---450-99000354197020331620110620104156.00-19-815260-4000354197USA01000354197(ALEPH)000354197USA0100035419720110620d1998----km-y0itay50------baengGB||||||||001yyFamilies in classical and hellenistic Greecerepresentations and realitiesSarah B. PomeroyOxfordClarendon Press1998X,261 p.ill.21 cm20012001001-------2001FamiglieGreciaSec. 5.-1. a. C.BNCF301POMEROY,Sarah B.186554ITsalbcISBD990003541970203316HS 3546611 DSABKDSADSA9020110620USA011041Families in classical and hellenistic Greece1113506UNISA03080nam 2200661 450 991016663380332120230807193811.01-118-86188-41-118-86184-19781118861899(CKB)3710000000495652(EBL)4039349(MiAaPQ)EBC4039349(DLC) 2015012035(Au-PeEL)EBL4039349(CaPaEBR)ebr11112939(OCoLC)905700275(EXLCZ)99371000000049565220151109h20152015 uy 0engur|n|---|||||rdacontentrdamediardacarrierSystem level ESD co-design /edited by Charvaka Duvvury, Harald GossnerWest Sussex, England :Wiley-IEEE Press,2015.©20151 online resource (533 p.)Wiley - IEEEDescription based upon print version of record.1-118-86190-6 Includes bibliographical references and index.Machine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index ."Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design space"--Provided by publisher.Wiley - IEEEShielding (Electricity)Electronic apparatus and appliancesDesign and constructionIntegrated circuitsDesign and constructionIntegrated circuitsProtectionElectrostaticsStatic eliminatorsShielding (Electricity)Electronic apparatus and appliancesDesign and construction.Integrated circuitsDesign and construction.Integrated circuitsProtection.Electrostatics.Static eliminators.537/.2TEC031000bisacshDuvvury CharvakaGossner HaraldMiAaPQMiAaPQMiAaPQBOOK9910166633803321System level ESD co-design2128102UNINA