01903oam 2200433zu 450 991014231170332120241212215424.097815386029041538602903(CKB)1000000000036126(SSID)ssj0000451376(PQKBManifestationID)12156197(PQKBTitleCode)TC0000451376(PQKBWorkID)10460489(PQKB)11117274(NjHacI)991000000000036126(EXLCZ)99100000000003612620160829d2005 uy engur|||||||||||txtccrDFT 2005: 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (03-05 October 2005/Monterey, CA)[Place of publication not identified]IEEE Computer Society Press20051 online resource (xii, 602 pages) illustrationsBibliographic Level Mode of Issuance: Monograph9780769524641 0769524648 Annotation DFT 2005 showcases the latest research results on yield analysis and modeling, scan design and test data compression, reconfiguration, error correcting codes and circuits, and fault detection and tolerance for sensor and flash memory. Its also covers delay fault test and timing consideration, interconnect test, approaches for soft error, on-line and concurrent fault detection, fault and error tolerant systems, and test scheduling and software-based test.Fault-tolerant computingCongressesFault-tolerant computing004.2Aitken Robert282271PQKBPROCEEDING9910142311703321DFT 2005: 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (03-05 October 20054434175UNINA