01724oam 2200421zu 450 991014205350332120210807000309.00-7381-1772-2(CKB)1000000000035766(SSID)ssj0000996527(PQKBManifestationID)12362738(PQKBTitleCode)TC0000996527(PQKBWorkID)10978563(PQKB)11618454(NjHacI)991000000000035766(EXLCZ)99100000000003576620160829d1999 uy engur|||||||||||txtccr1999 IEEE Standard for Integrated Circuit (IC) Delay and Power Calculation System[Place of publication not identified]IEEE19991 online resource (viii, 390 pages) illustrationsBibliographic Level Mode of Issuance: Monograph0-7381-1771-4 Ways for integrated circuit designers to analyze chip timing and power consistently across a broad set of electric design automation (EDA) applications are covered in this standard. Methods by which integrated circuit vendors can express timing and power information once per given technology are also covered. In addition, this standard covers means by which EDA vendors can meet their application performance and capacity needs.Integrated circuitsMicroelectronicsIntegrated circuits.Microelectronics.621.3815PQKBDOCUMENT99101420535033211999 IEEE Standard for Integrated Circuit (IC) Delay and Power Calculation System2575184UNINA