02406nam 2200409 450 991013475690332120230424140100.01-4799-7603-2(CKB)4160000000000208(NjHacI)994160000000000208(EXLCZ)99416000000000020820230424d2015 uy 0engur|||||||||||txtrdacontentcrdamediacrrdacarrier2015 20th IEEE European Test Symposium (ETS) ETS 2015 : May 25th-29th 2015, Cluj-Napoca, Romania /Institute of Electrical and Electronics EngineersPiscataway, New Jersey :IEEE,2015.1 online resource (211 pages) illustrations1-4799-7604-0 ETS15 is dedicated to presenting and discussing results, applications, emerging ideas and trends in the following topics Analog Test ATE Hardware and Software Board Test and Diagnosis Boundary Scan, BIST and Self Repair Current Based and Defect Based Test Delay and Performance Test Dependability and Functional Safety DfT Design for Manufacturing Diagnosis and Silicon Debug Economics of Test Emerging Technologies Failure Analysis Fault Modeling and Simulation Fault Tolerance GPU Test High Speed I O Test Low Power IC Test Memory Test and Repair MEMS Test Microprocessor Test Mixed Signal Test Multi Many core Processor Test Nanotechnology Test On line Test Power Issues in Test Reconfigurable System Test RF Test Security and Trust Issues in Test Sensor Test Signal Integrity Test SIP, Stacked, 3D IC Test SoC Test Soft Errors Standards in Test System Test Test compression Test Quality & Synthesis Thermal Issues in Test Validation and Verification Variability Issues in Test Yield Analysis.2015 20th IEEE European Test Symposium Test Symposium Automatic test equipmentCongressesElectronic digital computersCircuitsTestingCongressesIntegrated circuitsTestingCongressesAutomatic test equipmentElectronic digital computersCircuitsTestingIntegrated circuitsTesting620.0044NjHacINjHaclPROCEEDING99101347569033212015 20th IEEE European Test Symposium (ETS)2545102UNINA