00956nam0-2200313---450-99000957431040332120120516133203.0978-0-321-54799-6000957431FED01000957431(Aleph)000957431FED0100095743120120516d2010----km-y0itay50------baengUSa-------001yyDigital VLSI chip design with Cadence and Synopsys CAD toolsErik BrunvandBostonAddison-Wesley©2010xvi, 571 p.ill.24 cmCircuiti integratiIntegrazione a grandissima scala (VLSI)621.381'5Brunvand,Erik516526ITUNINARICAUNIMARCBK99000957431040332110 E II 660DIBET 2452DINELDINELDigital VLSI chip design with Cadence and Synopsys CAD tools846635UNINA