01688nlm0 22004691i 450 9900092506904033219783540390978000925069FED01000925069(Aleph)000925069FED0100092506920100926d2006----km-y0itay50------baengDEdrnn-008mamaaIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and SimulationRisorsa elettronica16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedingsedited by Johan VounckxBerlin ; HeidelbergSpringer2006Lecture Notes in Computer Science0302-97434148Documento elettronicoTestoFormato html, pdfAzemard,NadineMaurine,PhilippeVounckx,JohanITUNINAREICATUNIMARCFull text per gli utenti Federico IIhttp://dx.doi.org/10.1007/11847083EB990009250690403321Arithmetic and Logic StructuresCircuits and SystemsComputer scienceComputer ScienceComputer system performanceLogic designLogic DesignMemory management (Computer science)Memory StructuresProcessor ArchitecturesSystem Performance and EvaluationSystems engineeringIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation772134UNINA