00835nam0-22003011i-450-99000654604040332120001010000654604FED01000654604(Aleph)000654604FED0100065460420001010d--------km-y0itay50------baitay-------001yyTriumph in deaththe story of the Malagasy martyrsF.G. Smithforeword by J. Elwyn DaviesWelwynEvangelical Press1987.128 p. ill. 22 cm272.9Smith,F. Graeme246015Davies,J. ElwynITUNINARICAUNIMARCBK990006546040403321XIV E 356717227FSPBCFSPBCTriumph in death618974UNINAGEN0103859 am 22008293u 450 99620165840331620221206103744.02-8218-7542-8(CKB)3450000000002985(MH)012642935-9(SSID)ssj0000707248(PQKBManifestationID)12305192(PQKBTitleCode)TC0000707248(PQKBWorkID)10640734(PQKB)11494863(FrMaCLE)OB-gup-488(oapen)https://directory.doabooks.org/handle/20.500.12854/31073(PPN)202670945(EXLCZ)99345000000000298520110218d2010 uy 0gerurm|#---|||||txtrdacontentcrdamediacrrdacarrierDie Konstituierung von Cultural Property Forschungsperspektiven /Regina Bendix, Kilian Bizer, Stefan Groth (Hg.)Universitätsverlag Göttingen2010Göttingen :Universitätsverlag Göttingen,2010.1 online resource (ii, 320 pages) illustrations; digital, PDF file(s)Göttinger Studien zu Cultural Property ;Band 1Bibliographic Level Mode of Issuance: Monograph3941875612 Includes bibliographical references.Can ownership of culture make sense? The interest in bringing cultural property to the market or preventing it and thereby creating collective or individual, ideological or economic profit is shaped by the strongly divergent conditions that actors find in a postcolonial, late modern world. The interdisciplinary DFG research group on the constitution of cultural property has been shedding light on this question, which has been dealt with in the public eye for a number of years. The research group asks about the constitution of cultural property in the area of ​​tension between cultural, economic, legal and hereby also socio-political discourses. This also necessitates the new collaboration in this focused form of specialists from the cultural and social sciences as well as law and economics. The diversity of disciplinary access to a research area is shown just as clearly in the first results from ongoing research conveyed in this volume, as is the need to bring disciplinary points of view together in a joint effort in order to understand the process of constituting cultural property.Göttinger Studien zu Cultural Property ;1.Cultural propertyCultural propertyProtectionCultural propertyProtection (International law)World Heritage areasCultural propertyProtectionCultural propertyWorld Heritage areasHistory & ArchaeologyHILCCArchaeologyHILCCCultural PropertyIndigene VölkerKonventionKulturgutSbek thomUNESCOUNESCO-WelterbeWeltorganisation für geistiges EigentumCultural property.Cultural propertyProtection.Cultural propertyProtection (International law)World Heritage areas.Cultural propertyProtectionCultural propertyWorld Heritage areasHistory & ArchaeologyArchaeologyBendix Regina F.auth801019Bendix ReginaBizer Kilian.Groth StefanNyNyMARNyNyMARUkMaJRUBOOK996201658403316Die Konstituierung von Cultural Property3358313UNISA03476oam 2200397zu 450 99619954190331620210806235851.01-5090-9725-2(CKB)1000000000036025(SSID)ssj0000453730(PQKBManifestationID)12203628(PQKBTitleCode)TC0000453730(PQKBWorkID)10486352(PQKB)11345545(NjHacI)991000000000036025(EXLCZ)99100000000003602520160829d2005 uy engur|||||||||||txtccr2005 IEEE International High Level Design Validation and Test Workshop[Place of publication not identified]I E E E20051 online resource (viii, 250 pages) illustrationsBibliographic Level Mode of Issuance: Monograph0-7803-9571-9 Simulation-based functional test generation for embedded processors,"C. -- Scalable defect mapping and configuration of memory-based nanofabrics,"Chen -- Improvement of fault injection techniques based on VHDL code modification,"J. -- MVP: a mutation-based validation paradigm,"J. -- Establishing latch correspondence for embedded circuits of PowerPC microprocessors,"H. -- Sequential equivalence checking based on k-th invariants and circuit SAT solving,"Feng -- VERISEC: verifying equivalence of sequential circuits using SAT,"M. -- Automated clock inference for stream function-based system level specifications,"J. -- Cosimulation of ITRON-based embedded software with SystemC,"S. -- A software test program generator for verifying system-on-chips,"A. -- Stimulus generation for interface protocol verification using the nondeterministic extended finite state machine model,"Che-Hua -- DVGen: a test generator for the transmeta Efficeon VLIW processor,"K. -- Reuse in system-level stimuli-generation,"Y. -- Harnessing machine learning to improve the success rate of stimuli generation,"S. -- A new simulation-based property checking algorithm based on partitioned alternative search space traversal,"Qingwei -- Validating families of latency insensitive protocols,"S. -- GASIM: a fast Galois field based simulator for functional model,"D. -- Overlap reduction in symbolic system traversal,"P. -- Formal verification of high-level conformance with symbolic simulation,"R. -- A method for generation of GSTE assertion graphs,"E. -- Automatic abstraction refinement for Petri nets verification,"Zhenyu -- An optimum algorithm for compacting error traces for efficient functional debugging,"Chia-Chih -- Increasing the deducibility in CNF instances for efficient SAT-based bounded model checking,"V. -- B-cubing theory: new possibilities for efficient SAT-solving,"D. -- Multilevel design validation in a secure embedded system,"D. -- Security evaluation against electromagnetic analysis at design time,"Huiyun -- Formal meaning of coverage metrics in simulation-based hardware design verification,"I. -- Advanced analysis techniques for cross-product coverage,"H. -- A proof of correctness for the construction of property monitors,".Computer softwareVerificationCongressesComputer softwareVerification005.14PQKBPROCEEDING9961995419033162005 IEEE International High Level Design Validation and Test Workshop2341855UNISA