01764nam0 2200397 i 450 VAN012352020230704114929.55N978331907236420190923d2017 |0itac50 baengCH|||| |||||System Reduction for Nanoscale IC DesignPeter Benner editorChamSpringer2017xi, 197 p.ill.24 cm001VAN00670482001 Mathematics in industry210 Berlin [etc.]Springer20VAN0236030System Reduction for Nanoscale IC Design156170594-XXInformation and communication theory, circuits [MSC 2020]VANC019701MF65L80Numerical methods for differential-algebraic equations [MSC 2020]VANC023100MF94C05Analytic circuit theory [MSC 2020]VANC023168MFCircuit simulationKW:KComputational nanoelectronicsKW:KDevice simulationKW:KModel order reductionKW:KNanoelectronicsKW:KCHChamVANL001889BennerPeterVANV080987Springer <editore>VANV108073650ITSOL20240614RICAhttp://doi.org/10.1007/978-3-319-07236-4E-book – Accesso al full-text attraverso riconoscimento IP di Ateneo, proxy e/o ShibbolethBIBLIOTECA DEL DIPARTIMENTO DI MATEMATICA E FISICAIT-CE0120VAN08NVAN0123520BIBLIOTECA DEL DIPARTIMENTO DI MATEMATICA E FISICA08CONS e-book 0931 08eMF931 20190923 System Reduction for Nanoscale IC Design1561705UNICAMPANIA