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Record Nr. |
UNISA996465921503316 |
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Titolo |
Automated technology for verification and analysis : 6th international symposium, ATVA 2008, Seoul, Korea, October 20-23, 2008 : proceedings / / Sungdeok Cha [and three others] editors |
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Pubbl/distr/stampa |
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Berlin, Heidelberg : , : Springer-Verlag, , [2008] |
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©2008 |
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ISBN |
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Edizione |
[1st ed. 2008.] |
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Descrizione fisica |
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1 online resource (XIV, 430 p.) |
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Collana |
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Lecture Notes in Computer Science ; ; 5311 |
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Classificazione |
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Disciplina |
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Soggetti |
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Automatic theorem proving |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Note generali |
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Nota di bibliografia |
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Includes bibliographical references and index. |
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Nota di contenuto |
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Invited Talks -- Tests, Proofs and Refinements -- Formal Verification and Biology -- Trust and Automation in Verification Tools -- Model Checking -- CTL Model-Checking with Graded Quantifiers -- Genetic Programming and Model Checking: Synthesizing New Mutual Exclusion Algorithms -- Computation Tree Regular Logic for Genetic Regulatory Networks -- Compositional Verification for Component-Based Systems and Application -- A Direct Algorithm for Multi-valued Bounded Model Checking -- Software Verification -- Model Checking Recursive Programs with Exact Predicate Abstraction -- Loop Summarization Using Abstract Transformers -- Dynamic Model Checking with Property Driven Pruning to Detect Race Conditions -- Decision Procedures -- Automating Algebraic Specifications of Non-freely Generated Data Types -- Interpolants for Linear Arithmetic in SMT -- SAT Modulo ODE: A Direct SAT Approach to Hybrid Systems -- SMELS: Satisfiability Modulo Equality with Lazy Superposition -- Linear-Time Analysis -- Controllable Test Cases for the Distributed Test Architecture -- Tool Demonstration Papers -- Goanna: Syntactic Software Model Checking -- A Dynamic Assertion-Based Verification Platform for Validation of UML Designs -- CheckSpec: A Tool for Consistency and Coverage Analysis of Assertion Specifications -- DiVinE Multi-Core – A Parallel LTL Model-Checker -- Alaska -- NetQi: A Model Checker for Anticipation Game -- Component-Based Design and Analysis of |
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Embedded Systems with UPPAAL PORT -- Timed and Stochastic Systems -- Time-Progress Evaluation for Dense-Time Automata with Concave Path Conditions -- Decidable Compositions of O-Minimal Automata -- On the Applicability of Stochastic Petri Nets for Analysis of Multiserver Retrial Systems with Different Vacation Policies -- Model Based Importance Analysis for Minimal Cut Sets -- Theory -- Approximate Invariant Property Checking Using Term-Height Reduction for a Subset of First-Order Logic -- Tree Pattern Rewriting Systems -- Deciding Bisimilarity of Full BPA Processes Locally -- Optimal Strategy Synthesis in Request-Response Games -- Short Papers -- Authentication Revisited: Flaw or Not, the Recursive Authentication Protocol -- Impartial Anticipation in Runtime-Verification -- Run-Time Monitoring of Electronic Contracts -- Practical Efficient Modular Linear-Time Model-Checking -- Passive Testing of Timed Systems. |
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Sommario/riassunto |
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This book constitutes the refereed proceedings of the 6th International Symposium on Automated Technology for Verification and Analysis, ATVA 2008, held in Seoul, Korea, in October 2008. The 21 revised full papers 5 short papers and 7 tool papers presented together with 3 invited talks were carefully reviewed and selected from 82 submissions. The focos lies on theoretical methods to achieve correct software or hardware systems, including both functional and non functional aspects; as well as on applications of theory in engineering methods and particular domains and handling of practical problems occurring in tools. The papers are organized in topical sections on model checking, software verification, decision procedures, linear-time analysis, tool demonstration papers, timed and stochastic systems, theory, and short papers. |
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